PIC16F871-I/PT Microchip Technology, PIC16F871-I/PT Datasheet - Page 93

• Manufacturer Part Number: PIC16F871-I/PT
• Description: IC MCU FLASH 2KX14 EE 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F871-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: PSP, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 28 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3-DB16F871 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.3
The PIC16F870/871 differentiates between various
kinds of RESET:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during SLEEP
• WDT Reset (during normal operation)
• WDT Wake-up (during SLEEP)
• Brown-out Reset (BOR)
Some registers are not affected in any RESET condi-
tion. Their status is unknown on POR and unchanged
in any other RESET. Most other registers are reset to a
“RESET state” on Power-on Reset (POR), on the
MCLR and WDT Reset, on MCLR Reset during
FIGURE 11-4:
 2003 Microchip Technology Inc.
MCLR
OSC1
V
DD
Note 1: This is a separate oscillator from the RC oscillator of the CLKI pin.
RESET
RC OSC
On-chip
OST/PWRT
Brown-out
V
(1)
Module
Detect
DD
WDT
Reset
Rise
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
OST
PWRT
WDT
Time-out
Reset
10-bit Ripple Counter
10-bit Ripple Counter
BOREN
Power-on Reset
External
RESET
SLEEP
SLEEP, and Brown-out Reset (BOR). They are not
affected by a WDT Wake-up, which is viewed as the
resumption of normal operation. The TO and PD bits
are set or cleared differently in different RESET situa-
tions, as indicated in Table 11-4. These bits are used in
software to determine the nature of the RESET. See
Table 11-6 for a full description of RESET states of all
registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 11-4.
These devices have a MCLR noise filter in the MCLR
Reset path. The filter will detect and ignore small
pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
PIC16F870/871
S
R
DS30569B-page 91
Q
Enable PWRT
Enable OST
Chip_Reset