PIC18F2520-E/ML Microchip Technology, PIC18F2520-E/ML Datasheet - Page 191

IC PIC MCU FLASH 16KX16 28QFN

PIC18F2520-E/ML

Manufacturer Part Number
PIC18F2520-E/ML
Description
IC PIC MCU FLASH 16KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2520-E/ML

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
MCP3909RD-3PH1 - REF DESIGN MCP3909 3PH ENGY MTR
Lead Free Status / Rohs Status
 Details
17.4.8
To initiate a Start condition, the user sets the Start
Enable bit, SEN (SSPCON2<0>). If the SDA and SCL
pins are sampled high, the Baud Rate Generator is
reloaded with the contents of SSPADD<6:0> and starts
its count. If SCL and SDA are both sampled high when
the Baud Rate Generator times out (T
pin is driven low. The action of the SDA being driven
low while SCL is high is the Start condition and causes
the S bit (SSPSTAT<3>) to be set. Following this, the
Baud Rate Generator is reloaded with the contents of
SSPADD<6:0> and resumes its count. When the Baud
Rate Generator times out (T
(SSPCON2<0>) will be automatically cleared by
hardware; the Baud Rate Generator is suspended,
leaving the SDA line held low and the Start condition is
complete.
FIGURE 17-19:
© 2008 Microchip Technology Inc.
I
CONDITION TIMING
2
C MASTER MODE START
Write to SEN bit occurs here
FIRST START BIT TIMING
SDA
SCL
BRG
), the SEN bit
BRG
), the SDA
PIC18F2420/2520/4420/4520
SDA = 1,
SCL = 1
T
BRG
Set S bit (SSPSTAT<3>)
T
S
BRG
At completion of Start bit,
hardware clears SEN bit
17.4.8.1
If the user writes the SSPBUF when a Start sequence
is in progress, the WCOL is set and the contents of the
buffer are unchanged (the write doesn’t occur).
and sets SSPIF bit
Note:
Note:
T
Write to SSPBUF occurs here
BRG
1st bit
If, at the beginning of the Start condition,
the SDA and SCL pins are already sam-
pled low, or if during the Start condition, the
SCL line is sampled low before the SDA
line is driven low, a bus collision occurs,
the Bus Collision Interrupt Flag, BCLIF, is
set, the Start condition is aborted and the
I
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPCON2 is disabled until the Start
condition is complete.
2
C module is reset into its Idle state.
WCOL Status Flag
T
BRG
2nd bit
DS39631E-page 189

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