PIC24HJ16GP304-I/PT Microchip Technology, PIC24HJ16GP304-I/PT Datasheet - Page 173
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PIC24HJ16GP304-I/PT
Manufacturer Part Number
PIC24HJ16GP304-I/PT
Description
IC PIC MCU FLASH 16K 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP202-ISO.pdf
(272 pages)
3.PIC24HJ32GP202-ISO.pdf
(8 pages)
4.PIC24HJ32GP202-ISO.pdf
(12 pages)
5.PIC24HJ16GP304-IPT.pdf
(260 pages)
Specifications of PIC24HJ16GP304-I/PT
Core Size
16-Bit
Program Memory Size
16KB (5.5K x 24)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Number Of I /o
35
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC24
No. Of I/o's
35
Ram Memory Size
2KB
Cpu Speed
40MIPS
No. Of Timers
4
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ16GP304-I/PT
Manufacturer:
MICROCHIP
Quantity:
367
Company:
Part Number:
PIC24HJ16GP304-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
19.0
PIC24HJ32GP202/204
devices include several features that are intended to
maximize application flexibility and reliability, and
minimize
components. These are:
• Flexible configuration
• Watchdog Timer (WDT)
• Code Protection and CodeGuard™ Security
• JTAG Boundary Scan Interface
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit emulation
TABLE 19-1:
2009 Microchip Technology Inc.
0xF80000
0xF80002
0xF80004
0xF80006
0xF80008
0xF8000A FWDT
0xF8000C FPOR
0xF8000E FICD
0xF80010
0xF80012
0xF80014
0xF80016
Legend: — = unimplemented bit, read as ‘0’.
Note 1:
Note:
Address
2:
SPECIAL FEATURES
These bits are reserved and always read as ‘1’.
These bits are reserved for use by development tools and must be programmed as ‘1’.
cost
This data sheet summarizes the features
of
PIC24HJ16GP304 devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this
“dsPIC33F/PIC24F
Manual”. Please see the Microchip web
site (www.microchip.com) for the latest
dsPIC33F/PIC24H
Manual sections.
PIC24HJ32GP202/204 and PIC24HJ16GP304
FBS
Reserved
FGS
FOSCSEL
FOSC
FUID0
FUID1
FUID2
FUID3
Name
the
DEVICE CONFIGURATION REGISTER MAP
through
data
PIC24HJ32GP202/204
sheet,
FWDTEN
and
elimination
IESO
Bit 7
FCKSM<1:0>
—
—
—
Reserved
Family
Family
PIC24HJ16GP304
refer
Reserved
WINDIS
(2)
Bit 6
of
—
—
—
—
Reference
Reference
to
external
(1)
and
IOL1WAY
the
JTAGEN
Preliminary
Bit 5
—
—
—
—
—
User Unit ID Byte 0
User Unit ID Byte 1
User Unit ID Byte 2
User Unit ID Byte 3
19.1
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’), to select
various device configurations. These bits are mapped
starting at program memory location 0xF80000.
The Device Configuration register map is shown in
Table 19-1.
The individual Configuration bit descriptions for the
Configuration registers are shown in Table 19-2.
Note that address 0xF80000 is beyond the user
program memory space. It belongs to the configuration
memory space (0x800000-0xFFFFFF), which can only
be accessed using table reads and table writes.
To prevent the inadvertent configuration changes
during code execution, all programmable Configuration
bits are write-once. After a bit is initially programmed
during a power cycle, it cannot be written to again.
Changing a device configuration requires that power to
the device be cycled.
WDTPRE
ALTI2C
Bit 4
—
—
—
—
—
Configuration Bits
—
Bit 3
—
—
—
—
—
BSS<2:0>
OSCIOFNC POSCMD<1:0>
WDTPOST<3:0>
Bit 2
—
—
GSS<1:0>
FPWRT<2:0>
FNOSC<2:0>
DS70289F-page 173
Bit 1
—
ICS<1:0>
GWRP
BWRP
Bit 0
—