PIC18F26J50-I/ML Microchip Technology, PIC18F26J50-I/ML Datasheet - Page 415
![IC PIC MCU FLASH 64K 2V 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F26J50-I/ML
Manufacturer Part Number
PIC18F26J50-I/ML
Description
IC PIC MCU FLASH 64K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
4.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F26J50-I/ML
Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
A/d Bit Size
10 bit
A/d Channels Available
10
Height
0.88 mm
Length
6 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.15 V
Width
6 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F26J50-I/ML
Manufacturer:
PANASONIC
Quantity:
2 000
- PIC18LF24J10-ISS PDF datasheet
- PIC18LF24J50-ISS PDF datasheet #2
- PIC18LF24J50-ISS PDF datasheet #3
- PIC18F26K20-ISO PDF datasheet #4
- Current page: 415 of 430
- Download datasheet (7Mb)
PIC18F2XK20/4XK20
APPENDIX A:
REVISION HISTORY
Revision A (JULY 2006)
Original data sheet for PIC18F2XK20/4XK20 devices.
Revision B (03/2007)
Added
part
numbers
PIC18F26K20
and
PIC18F46K20;
Replaced
Development
Support
Section; Replaced Package Drawings.
Revision C (10/2007)
Revised Table 1, DIL Pins 34 and 35; Table 2, Pins 22
and 24; Table 1-2, Pins RB1 and RB3; Table 1-3, Pins
RB1 and RB3; Revised Sections 4.3, 4.4, 4.4.1, 4.4.2,
4.4.4; Revised Table 4-3, Note 2; Revised Table 6-1;
Revise Section 7.8: Revised Section 9.2; Revised
Examples 10-1 and 10-2; Revised Table 10-3, Pins
RB1 and RB3; Revised Sections 12.2 through 12.5;
Revised Register 16-1, bit 3-0; Revised Sections 16.1,
16.2, 16.4.4; Revised Register 16-2, bit 6-4; Revised
Table 16-2, Note 2; Revised Register 17-1, bit 6;
Revised Register 17-3; Revised Table 17-4; Revised
Register 19-1, added Note 2; Revised Register 20-3,
bits 5 and 4; Revised Register 23-4, bit 1; Revised Reg-
ister 23-12, bit 7-5; Revised Section 23.3; Revised Sec-
tion 24.1.1, instruction set descriptions; Revised
Section 26.0, voltage on MCLR; Revised DC Charac-
teristics 26.2, 26.3, 26.4 26.5, 26.6, 26.7, 26.8 and
26.10; Revised Tables 26-1, 26-6, 26-7, 26-9, 26-23.
Revision D (08/2008)
Update to Peripheral Highlights (USART module);
Deleted
Section
2.2.6
(Oscillator
Transistions);
Revised Sections 2.5.3, 2.9; Added Section 2.9.3
(Clock Switch Timing); Deleted Section 2.10.4 (Clock
Switching
Timing);
Replaced
BAUDCTL
with
BAUDCON throughout; Revised Table 5-2 (PLUSW0,
PLUSW1, PLUSW2); Add Note 1 to Table 7-1
(EEADRH); Revised Section 6.4.4 and Register 16-2
(FLT0 pin); Revised Registers 17-2 and 17-5
(SSPEN); Revised Register 17-6 (SEN); Added new
paragraph after Figure 18-2; Revised Note, Section
18.1.1; Deleted Note, Section 18.1.2; Added new Note
2, Sections 18.1.2.9 and 18.1.2.10; Revised Note 1,
Section 18.3.1; Added Section 18.3.2; Revised
Section 18.3.5; Added new Note 2, Sections 18.4.1.5,
18.4.1.10, 18.4.2.2, 18.4.2.4; Revised Register 21-1
(CVR); Revised Note 1, Registers 23-6, 23.8, 23-10,
Table 23-3; Added new Figure 26-1; Revised 26.2,
26.6, 26.7 (Note 3), 26.8, 26.9, 26.10; Revised Tables
26-1, 26-2, 26-3, 26-6, 26-7, 26-8, 26-25; Updated
Package Drawings.
Preliminary
© 2008 Microchip Technology Inc.
DS41303D-page 413
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