PIC18F85J90-I/PT Microchip Technology, PIC18F85J90-I/PT Datasheet - Page 25

• Manufacturer Part Number: PIC18F85J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F85J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 67
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 67
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

3.4.11
© 2009 Microchip Technology Inc.
ENERGY_W_
REGISTER 3-11:
These four registers represent the total active energy accumulated. The
ENERGY_W_L_RAW register is the total active energy accumulated over the previous
LINE_CYC line cycles.
Accumulation is done every line cycle and is:
EQUATION 3-1:
During calibration, ENERGY_W_Z, ENERGY_W, and ENERGY_W_L_RAW will all
have the same value.
Also, during calibration, the PHA_W_OFF register additions are skipped and the
PHA_W_GAIN values are all set to their default value of 0x4000 (16,384).
The ENERGY_W_L_RAW register is the register that should be read when calibrating
CFNUM and CFDEN.
This register is updated every line cycle (updating ends once LINE_CYC line cycles
have passed if calibration is enabled).
ENERGY_W
Where:
+
+
ENERGY_W_L_RAW
PERIOD
(
(
PHB_W_RAW
PHC_W_RAW
ENERGY_W_Z
ENERGY_W_L
ENERGY_W
Name
Calculation and Register Description
=
=
ENERGY_W
+
+
the period (in 1.6 µs clock ticks) for the most recent line cycle.
ENERGY_W_ REGISTERS
PHB_W_OFF
PHC_W_OFF
Bits
+
64
64
32
48
(
PHA_W_RAW
)
)
•
•
⎛
⎝
⎛
⎝
Address
PHB_W_GAIN
----------------------------------- -
PHC_W_GAIN
------------------------------------ -
0x0CC
0x0DA
0x0C4
0x0D4
32768
32768
+
PHA_W_OFF
Cof
R
R
R
R
⎞
⎠
⎞
⎠
•
PERIOD
---------------------- -
65536
)
•
⎛
⎝
PHA_W_GAIN
----------------------------------- -
DS51884A-page 25
32768
⎞
⎠