PIC16F84A-20E/P Microchip Technology, PIC16F84A-20E/P Datasheet - Page 114
![IC MCU CMOS 20MHZ 1K FLASH 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16F84A-20E/P
Manufacturer Part Number
PIC16F84A-20E/P
Description
IC MCU CMOS 20MHZ 1K FLASH 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84A-20E/P
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
For Use With
I3-DB16F84A - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
7.1
DS31007A-page 7-2
Introduction
The EEPROM data memory is readable and writable during normal operation (full V
This memory is not directly mapped in the register file space. Instead it is indirectly addressed
through the Special Function Registers. There are four SFRs used to read and write this memory.
These registers are:
• EECON1
• EECON2 (not a physically implemented register)
• EEDATA
• EEADR
EEDATA holds the 8-bit data for read/write, and EEADR holds the address of the EEPROM loca-
tion being accessed. The 8-bit EEADR register can access up to 256 locations of Data EEPROM.
The EEADR register can be thought of as the indirect addressing register of the Data EEPROM.
EECON1 contains the control bits, while EECON2 is the register used to initiate the read/write.
Some devices will implement less then the entire memory map. The address range always starts
at 0h, and goes throughout the memory available.
device memory sizes and the address range for those sizes.
Table 7-1:
The EEPROM data memory allows byte read and write. A byte write automatically erases the
location and writes the new data (erase before write). The EEPROM data memory is rated for
high erase/write cycles. The write time is controlled by an on-chip timer. The write-time will vary
with voltage and temperature as well as from chip to chip. Please refer to the AC specifications
for exact limits.
When the device is code protected, the CPU may continue to read and write the data EEPROM
memory. The device programmer can no longer access this memory.
Note 1: Presently, devices are only offered with 64
Data EEPROM
bytes of Data EEPROM.
Size
128
256
64
Possible Data EEPROM Memory Sizes
(1)
Address Range
0h - FFh
0h - 3Fh
0h - 7Fh
Table 7-1
shows some of the possible common
1997 Microchip Technology Inc.
DD
range).
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