PIC18F2525-E/SO Microchip Technology, PIC18F2525-E/SO Datasheet - Page 20

• Manufacturer Part Number: PIC18F2525-E/SO
• Description: IC MCU FLASH 24KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2525-E/SO

• Core Size: 8-Bit
• Program Memory Size: 48KB (24K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.875KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DB18F4620 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Details

PIC18F2XXX/4XXX FAMILY
3.3
Data EEPROM is accessed one byte at a time via an
Address Pointer (register pair: EEADRH:EEADR) and
a data latch (EEDATA). Data EEPROM is written by
loading EEADRH:EEADR with the desired memory
location, EEDATA, with the data to be written and initi-
ating a memory write by appropriately configuring the
EECON1 register. A byte write automatically erases the
location and writes the new data (erase-before-write).
When using the EECON1 register to perform a data
EEPROM write, both the EEPGD and CFGS bits must
be cleared (EECON1<7:6> = 00). The WREN bit must
be set (EECON1<2> = 1) to enable writes of any sort
and this must be done prior to initiating a write
sequence. The write sequence is initiated by setting the
WR bit (EECON1<1> = 1).
The write begins on the falling edge of the 4th PGC
after the WR bit is set. It ends when the WR bit is
cleared by hardware.
FIGURE 3-7:
DS39622L-page 20
PIC18F2410
PIC18F2450
PIC18F2510
PIC18F2515
PIC18F2610
Note:
PGC
PGD
Poll WR bit
Data EEPROM Programming
4-Bit Command
1
0
Data EEPROM programming is not
available on the the following devices:
2
0
3
0
4
0
PGC
PGD
P5
DATA EEPROM WRITE TIMING
BSF EECON1, WR
1
4-Bit Command
PIC18F4410
PIC18F4450
PIC18F4510
PIC18F4515
PIC18F4610
2
1
0
2
0
15 16
3
0
4
0
P5A
P5
MOVF EECON1, W, 0
1
2
PGD = Input
PGD = Input
15 16
P5A
4-Bit Command
1
Poll WR bit, Repeat until Clear
0
After the programming sequence terminates, PGC must
still be held low for the time specified by Parameter P10
to allow high-voltage discharge of the memory array.
FIGURE 3-6:
2
0
3
0
P11A
(see below)
4
0
P5
MOVWF TABLAT
1
No
2
15 16
PROGRAM DATA FLOW
Enable Write
Set Address
Start Write
Sequence
 2010 Microchip Technology Inc.
Set Data
Done?
WR bit
clear?
Done
Start
P5A
Yes
Yes
(see Figure 4-4)
PGD = Output
Shift Out Data
No
P10
16-Bit Data
Payload
1
n
2
n