PIC18F4431-E/PT Microchip Technology, PIC18F4431-E/PT Datasheet - Page 261

• Manufacturer Part Number: PIC18F4431-E/PT
• Description: IC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/PT

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.5
When enabled, the LVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the LVDIF bit will be set and the device will wake-
up from Sleep. Device execution will continue from the
interrupt vector address if interrupts have been globally
enabled.
22.6
A device Reset forces all registers to their Reset state.
This forces the LVD module to be turned off.
FIGURE 22-3:
TABLE 22-1:
 2010 Microchip Technology Inc.
LVDCON
INTCON
IPR2
PIR2
PIE2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the LVD module.
Name
Operation During Sleep
Effects of a Reset
GIE/GIEH
V
V
OSCFIP
OSCFIF
OSCFIE
A
B
Bit 7
—
REGISTERS ASSOCIATED WITH LOW-VOLTAGE DETECT MODULE
TYPICAL LOW-VOLTAGE DETECT APPLICATION
PEIE/GIEL
Bit 6
—
—
—
—
Time
TMR0IE
IRVST
T
Bit 5
A
—
—
—
PIC18F2331/2431/4331/4431
T
B
LVDEN
INT0IE
EEIP
EEIE
Bit 4
EEIF
22.7
Figure 22-3
(typically for batteries). Over time, the device voltage
decreases. When the device voltage equals voltage,
V
time, T
until the device voltage is no longer in valid operating
range, to perform “housekeeping tasks” and to shut
down the system. Voltage point, V
valid operating voltage specification. This occurs at
time, T
shutdown.
A
LVDL3
, the LVD logic generates an interrupt. This occurs at
RBIE
Bit 3
—
—
—
A
B
Legend:
. The application software then has the time,
. The difference, T
Applications
shows a possible application voltage curve
TMR0IF
LVDL2
LVDIP
LVDIF
LVDIE
Bit 2
V
V
A
B
= LVD trip point
= Minimum valid device
operating voltage
B
LVDL1
INT0IF
– T
Bit 1
—
—
—
A
, is the total time for
DS39616D-page 261
B
, is the minimum
CCP2IP
CCP2IE
CCP2IF
LVDL0
RBIF
Bit 0