ATMEGA32L-8AUR Atmel, ATMEGA32L-8AUR Datasheet - Page 88
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ATMEGA32L-8AUR
Manufacturer Part Number
ATMEGA32L-8AUR
Description
MCU AVR 32K FLASH 8MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32L-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
44TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
TWI/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Definitions
Compatibility
2503Q–AVR–02/11
The Input Capture Register can capture the Timer/Counter value at a given external (edge trig-
gered) event on either the Input Capture Pin (ICP1) or on the Analog Comparator pins
“Analog Comparator” on page
Canceler) for reducing the chance of capturing noise spikes.
The TOP value, or maximum Timer/Counter value, can in some modes of operation be defined
by either the OCR1A Register, the ICR1 Register, or by a set of fixed values. When using
OCR1A as TOP value in a PWM mode, the OCR1A Register can not be used for generating a
PWM output. However, the TOP value will in this case be double buffered allowing the TOP
value to be changed in run time. If a fixed TOP value is required, the ICR1 Register can be used
as an alternative, freeing the OCR1A to be used as PWM output.
The following definitions are used extensively throughout the document:
Table 43. Definitions
The 16-bit Timer/Counter has been updated and improved from previous versions of the 16-bit
AVR Timer/Counter. This 16-bit Timer/Counter is fully compatible with the earlier version
regarding:
•
•
•
The following control bits have changed name, but have same functionality and register location:
•
•
•
The following bits are added to the 16-bit Timer/Counter Control Registers:
•
•
The 16-bit Timer/Counter has improvements that will affect the compatibility in some special
cases.
BOTTOM
MAX
TOP
All 16-bit Timer/Counter related I/O Register address locations, including Timer Interrupt
Registers.
Bit locations inside all 16-bit Timer/Counter Registers, including Timer Interrupt Registers.
Interrupt Vectors.
PWM10 is changed to WGM10.
PWM11 is changed to WGM11.
CTC1 is changed to WGM12.
FOC1A and FOC1B are added to TCCR1A.
WGM13 is added to TCCR1B.
The counter reaches the BOTTOM when it becomes 0x0000.
The counter reaches its MAXimum when it becomes 0xFFFF (decimal 65535).
The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be one of the fixed values:
0x00FF, 0x01FF, or 0x03FF, or to the value stored in the OCR1A or ICR1 Regis-
ter. The assignment is dependent of the mode of operation.
198.) The Input Capture unit includes a digital filtering unit (Noise
ATmega32(L)
(See
88
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