DSPIC30F2020-30I/MMB32 Microchip Technology, DSPIC30F2020-30I/MMB32 Datasheet - Page 61

• Manufacturer Part Number: DSPIC30F2020-30I/MMB32
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2020-30I/MMB32

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: Q4035438A

REGISTER 5-6:
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
R/W-0
T3IE
U-0
—
Unimplemented: Read as ‘0’
MI2CIE: I
1 = Interrupt request enabled
0 = Interrupt request not enabled
SI2CIE: I
1 = Interrupt request enabled
0 = Interrupt request not enabled
NVMIE: Nonvolatile Memory Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
ADIE: ADC Conversion Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1TXIE: UART1 Transmitter Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1RXIE: UART1 Receiver Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SPI1IE: SPI1 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T3IE: Timer3 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T2IE: Timer2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC2IE: Output Compare Channel 2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
T1IE: Timer1 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
MI2CIE
R/W-0
R/W-0
T2IE
IEC0: INTERRUPT ENABLE CONTROL REGISTER 0
2
2
C Slave Events Interrupt Enable bit
C Master Events Interrupt Enable bit
W = Writable bit
‘1’ = Bit is set
SI2CIE
OC2IE
R/W-0
R/W-0
NVMIE
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
ADIE
T1IE
dsPIC30F1010/202X
U1TXIE
OC1IE
R/W-0
R/W-0
x = Bit is unknown
U1RXIE
R/W-0
R/W-0
IC1IE
DS70178C-page 59
SPI1IE
INT0IE
R/W-0
R/W-0
bit 8
bit 0