ATMEGA644PV-10MQ Atmel, ATMEGA644PV-10MQ Datasheet - Page 154
![MCU AVR 64K FLASH 10MHZ 44-QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA644PV-10MQ
Manufacturer Part Number
ATMEGA644PV-10MQ
Description
MCU AVR 64K FLASH 10MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644PV-10MQ
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8011O–AVR–07/10
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 14-5.
Table 14-6
mode.
Table 14-6.
Note:
Table 14-7
rect PWM mode.
Table 14-7.
Note:
• Bits 3:2 – Res: Reserved Bits
These bits are reserved bits in the ATmega164P/324P/644P and will always read as zero.
COM2B1
COM2B1
COM2B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 145
pare Match is ignored, but the set or clear is done at TOP. See
page 147
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM2B0
COM2B0
COM2B0
for more details.
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 14-5
Normal port operation, OC2B disconnected.
Toggle OC2B on Compare Match
Clear OC2B on Compare Match
Set OC2B on Compare Match
Description
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match, set OC2B at BOTTOM,
(non-inverting mode).
Set OC2B on Compare Match, clear OC2B at BOTTOM,
(inverting mode).
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match when up-counting. Set OC2B on
Compare Match when down-counting.
Set OC2B on Compare Match when up-counting. Clear OC2B on
Compare Match when down-counting.
shows the COM2B1:0 bit functionality when the WGM22:0 bits
ATmega164P/324P/644P
(1)
(1)
”Phase Correct PWM Mode” on
”Fast PWM Mode” on
154
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