PIC16C72-20/SP Microchip Technology, PIC16C72-20/SP Datasheet - Page 64

• Manufacturer Part Number: PIC16C72-20/SP
• Description: IC MCU OTP 2KX14 A/D PWM 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C72-20/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, SPI, SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2.5 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: Q858228

PIC16C72 Series
10.8
On power-up the time-out sequence is as follows: First
PWRT time-out is invoked after the POR time delay has
expired. Then OST is activated. The total time-out will
vary based on oscillator configuration and the status of
the PWRT. For example, in RC mode with the PWRT
disabled, there will be no time-out at all. Figure 10-7,
Figure 10-8, Figure 10-9 and Figure 10-10 depict time-
out sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 10-9). This is useful for testing purposes or to
synchronize more than one PIC16CXXX family device
operating in parallel.
Table 10-5 shows the reset conditions for some special
function registers, while Table 10-6 shows the reset
conditions for all the registers.
TABLE 10-3
TABLE 10-4
TABLE 10-5
DS39016A-page 64
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt wake-up from SLEEP
Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'.
Note 1:
POR
Oscillator Configura-
0
0
0
1
1
1
1
1
XT, HS, LP
Time-out Sequence
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
BOR
tion
RC
x
x
x
0
1
1
1
1
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS AND THEIR SIGNIFICANCE
RESET CONDITION FOR SPECIAL REGISTERS
TO
1
0
x
x
0
0
u
1
Condition
PD
1
x
0
x
1
0
u
0
PWRTE = 0
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
1024T
72 ms +
72 ms
OSC
Power-up
Preliminary
PWRTE = 1
1024T
Program
PC + 1
Counter
—
PC + 1
000h
000h
000h
000h
000h
OSC
(1)
10.9
The Power Control/Status Register, PCON has up to
two bits, depending upon the device.
Bit0 is Brown-out Reset Status bit, BOR. Bit BOR is
unknown on a Power-on Reset. It must then be set by
the user and checked on subsequent resets to see if bit
BOR cleared, indicating a BOR occurred. The BOR bit
is a "Don’t Care" bit and is not necessarily predictable
if the Brown-out Reset circuitry is disabled (by clearing
bit BODEN in the Configuration Word).
Bit1 is POR (Power-on Reset Status bit). It is cleared
on a Power-on Reset and unaffected otherwise. The
user must set this bit following a Power-on Reset.
72 ms + 1024T
Power Control/Status Register
(PCON)
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
Register
STATUS
Brown-out
72 ms
OSC
1998 Microchip Technology Inc.
Wake-up from
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
Register
1024T
PCON
SLEEP
—
OSC