DSPIC30F2023-30I/PTD32 Microchip Technology, DSPIC30F2023-30I/PTD32 Datasheet - Page 11

• Manufacturer Part Number: DSPIC30F2023-30I/PTD32
• Description: IC DSPIC MCU/DSP 12K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2023-30I/PTD32

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: Q4035438

19. Module: MCLR Pin
EXAMPLE 1:
EXAMPLE 2:
© 2008 Microchip Technology Inc.
/* Insert the following instructions at the beginning of the assembly program as shown below:*/
int main (void)
{
}
; Insert the following instructions at the beginning of the assembly program as shown:
A brown-out event occurs when V
the minimum operating voltage for the device but
not all the way down to V
SMPS device is running with the PLL enabled and
a brown-out event occurs, the device may stop
running and the MCLR pin will not reset the device.
If this occurs, the device can only be reset by
cycling power to the V
It is recommended that an external Brown-out
Reset (BOR) circuit be used to hold the device in
Reset during a brown-out event, to overcome this
problem. The external BOR circuit will use the
MCLR pin to hold the device in reset. The following
work around, in combination with the external BOR
circuit, will ensure that the device is cleanly reset
after a brown-out event occurs.
Work around
The dsPIC DSC SMPS device must be powered
up with the PLL disabled, the Fail-Safe Clock
Monitor enabled, and clock switching enabled.
The PLL should be enabled in software via a clock
_builtin_write_OSCCONH(1); /* NOSC value for FRC+PLL */
_builtin_write_OSCCONL(1); /* Set OSWEN bit */
/* Continue original program here */
...
.global_reset:
...
...
_reset:
nop
nop
; Continue original program here
...
...
mov
mov
mov
mov
mov.b
mov.b
mov.b
mov
mov
mov
mov
mov.b
mov.b
mov.b
#OSCCON+1,w4
#0x0078, w0
#0x009A, w1
#0x0001, w2
w0, [w4]
w1, [w4]
w2, [w4]
#OSCCON,w4
#0x0046, w0
#0x0057, w1
#0x0001, w2
w0, [w4]
w1, [w4]
w2, [w4]
ASSEMBLY PROGRAM CLOCK SWITCH FROM FRC TO FRC + PLL
C PROGRAM CLOCK SWITCH FROM FRC TO FRC + PLL
DD
SS
pins.
. When the dsPIC DSC
; Get address of high OSCCON byte
; 1st password for high byte access to OSCCON
; 2nd password for low byte access to OSCCON
; NOSC value for FRC+PLL
; Write 1st password
; Write 2nd password
; Write NOSC value
; Get address of low OSCCON byte
; 1st password for high byte access to OSCCON
; 2nd password for low byte access to OSCCON
; Set OSWEN bit
; Write 1st password
; Write 2nd password
; Write OSWEN bit
DD
drops below
FIGURE 2:
*Any commercially available BOR circuit
can be used in this configuration. Refer to
the BOR circuit manufacturer’s data sheet
for exact circuit configuration.
dsPIC30F1010/202X
switch after the device is reset (refer to Section
29. “Oscillator” (DS70268) in the “dsPIC30F
Family Reference Manual” (DS70046) for details
on clock switching). This ensures that the MCLR
pin is functional and that the device can be reset
by an external BOR circuit (see Figure 2).
Use the code provided in Example 1 and
Example 2 to achieve the work around.
+5V
External
Circuit
BOR
U2*
R*
U1
DS80290J-page 11
MCLR
V
V
SS
DD
+5V