DSPIC30F3013-20I/SP Microchip Technology, DSPIC30F3013-20I/SP Datasheet - Page 60
![IC DSPIC MCU/DSP 24K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC30F3013-20I/SP
Manufacturer Part Number
DSPIC30F3013-20I/SP
Description
IC DSPIC MCU/DSP 24K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(210 pages)
2.DSPIC30F2011-20ISO.pdf
(6 pages)
3.DSPIC30F3012-20ISO.pdf
(14 pages)
4.DSPIC30F3012-20ISO.pdf
(20 pages)
5.DSPIC30F2012-30ISO.pdf
(205 pages)
Specifications of DSPIC30F3013-20I/SP
Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
30
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301320ISP
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F2011-20ISO PDF datasheet #2
- DSPIC30F3012-20ISO PDF datasheet #3
- DSPIC30F3012-20ISO PDF datasheet #4
- DSPIC30F2012-30ISO PDF datasheet #5
- Current page: 60 of 205
- Download datasheet (3Mb)
dsPIC30F2011/2012/3012/3013
7.2
The use of the ADPCFG and TRIS registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bit set (input). If the TRIS bit is cleared
(output), the digital output level (V
converted.
When the PORT register is read, all pins configured as
analog input channels are read as cleared (a low level).
Pins configured as digital inputs will not convert an ana-
log input. Analog levels on any pin that is defined as a
digital input (including the ANx pins) may cause the
input buffer to consume current that exceeds the
device specifications.
DS70139E-page 58
Configuring Analog Port Pins
OH
or V
OL
) is
7.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be a NOP.
EXAMPLE 7-1:
MOV #0xF0, W0; Configure PORTB<7:4>
MOV W0, TRISB; and PORTB<3:0> as outputs
NOP
btss PORTB, #7; bit test RB7 and skip if set
I/O PORT WRITE/READ TIMING
; as inputs
; additional instruction cycle
PORT WRITE/READ
EXAMPLE
© 2006 Microchip Technology Inc.
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