PIC18F2580-E/SO Microchip Technology, PIC18F2580-E/SO Datasheet - Page 415
![IC PIC MCU FLASH 16KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F2580-E/SO
Manufacturer Part Number
PIC18F2580-E/SO
Description
IC PIC MCU FLASH 16KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F4480-IPT.pdf
(490 pages)
3.PIC18F4480-IPT.pdf
(8 pages)
4.PIC18F4480-IPT.pdf
(6 pages)
5.PIC18F4480-IPT.pdf
(6 pages)
6.PIC18F2580-ESO.pdf
(483 pages)
Specifications of PIC18F2580-E/SO
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
SPI/I2C/MSSP/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2580-E/SO
Manufacturer:
Microchi
Quantity:
2 952
- PIC18F2221-ISO PDF datasheet
- PIC18F4480-IPT PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18F4480-IPT PDF datasheet #4
- PIC18F4480-IPT PDF datasheet #5
- PIC18F2580-ESO PDF datasheet #6
- Current page: 415 of 490
- Download datasheet (9Mb)
ADDWF
Syntax:
Operands:
Operation:
Status Affected: N, OV, C, DC, Z
Encoding:
Description:
Words:
Cycles:
Example:
© 2009 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
OFST
FSR2
Contents
of 0A2Ch
W
Contents
of 0A2Ch
Q1
ADD W to Indexed
(Indexed Literal Offset mode)
ADDWF
0 ≤ k ≤ 95
d ∈ [0,1]
a = 0
(W) + ((FSR2) + k) → dest
The contents of W are added to the contents
of the register indicated by FSR2, offset by the
value ‘k’.
If ‘d’ is ‘0’, the result is stored in W. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
1
1
0010
Read ‘k’
ADDWF
Q2
[k] {,d}
01d0
=
=
=
=
=
=
[OFST] ,0
17h
2Ch
0A00h
20h
37h
20h
Process
Data
Q3
kkkk
destination
Write to
PIC18F2480/2580/4480/4580
Q4
kkkk
BSF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
SETF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
Decode
FLAG_OFST
FSR2
Contents
of 0A0Ah
Contents
of 0A0Ah
OFST
FSR2
Contents
of 0A2Ch
Contents
of 0A2Ch
Q1
Q1
register ‘f’
BSF
Bit Set Indexed
(Indexed Literal Offset mode)
BSF [k], b
0 ≤ f ≤ 95
0 ≤ b ≤ 7
a = 0
1 → ((FSR2 + k))<b>
None
Bit ‘b’ of the register indicated by FSR2,
offset by the value ‘k’, is set.
1
1
Set Indexed
(Indexed Literal Offset mode)
SETF [k]
0 ≤ k ≤ 95
FFh → ((FSR2) + k)
None
The contents of the register indicated
by FSR2, offset by ‘k’, are set to FFh.
1
1
Read ‘k’
SETF
Read
1000
0110
Q2
Q2
=
=
=
=
=
=
=
=
2Ch
0A00h
00h
FFh
[FLAG_OFST], 7
[OFST]
bbb0
1000
0Ah
0A00h
Process
55h
D5h
Process
Data
Data
Q3
Q3
DS39637D-page 415
kkkk
kkkk
destination
Write to
register
Write
Q4
Q4
kkkk
kkkk
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