ATMEGA324A-MU Atmel, ATMEGA324A-MU Datasheet - Page 309
![IC MCU AVR 32K 20MHZ 44VQFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA324A-MU
Manufacturer Part Number
ATMEGA324A-MU
Description
IC MCU AVR 32K 20MHZ 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA324A-MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
JTAG, TWI, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8272A–AVR–01/10
Figure 26-7. Parallel Programming Timing, Including some General Timing Requirements
Figure 26-8. Parallel Programming Timing, Loading Sequence with Timing Requirements
Note:
Figure 26-9. Parallel Programming Timing, Reading Sequence (within the Same Page) with
Note:
164A/164PA/324A/324PA/644A/644PA/1284/1284P
(DATA, XA0/1, BS1, BS2)
1. The timing requirements shown in
1. The timing requirements shown in
XTAL1
DATA
PAGEL
XTAL1
BS1
XA0
XA1
DATA
OE
apply to loading operation.
apply to reading operation.
BS1
XA0
XA1
Data & Contol
Timing Requirements
RDY/BSY
PAGEL
XTAL1
ADDR0 (Low Byte)
LOAD ADDRESS
ADDR0 (Low Byte)
LOAD ADDRESS
WR
(LOW BYTE)
(LOW BYTE)
t
XLOL
t
OLDV
t
t
BVPH
DVXH
(1)
LOAD DATA
(LOW BYTE)
DATA (Low Byte)
t
t
XHXL
PHPL
(LOW BYTE)
DATA (Low Byte)
Figure 26-7 on page 309
READ DATA
Table 26-7 on page 309
t
t
t
t
t
XLXH
XLDX
XLWL
PLBX
PLWL
t
BVDV
t
(HIGH BYTE)
LOAD DATA
BVWL
DATA (High Byte)
(HIGH BYTE)
READ DATA
DATA (High Byte)
t
XLPH
t
WLWH
LOAD DATA
WLRL
(i.e., t
(i.e., t
t
OHDZ
t
PLXH
DVXH
DVXH
t
WLBX
LOAD ADDRESS
LOAD ADDRESS
, t
(LOW BYTE)
(LOW BYTE)
, t
ADDR1 (Low Byte)
XHXL
ADDR1 (Low Byte)
XHXL
, and t
, and t
t
WLRH
XLDX
XLDX
) also
) also
(1)
309
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