ATXMEGA32D4-AU Atmel, ATXMEGA32D4-AU Datasheet - Page 90

• Manufacturer Part Number: ATXMEGA32D4-AU
• Description: IC MCU AVR 32KB FLASH 100TQFP
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA32D4-AU

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATXMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

33. Errata
33.1
33.1.1
8135J–AVR–12/10
ATxmega16D4, ATxmega32D4
rev. A/B
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1. Bandgap voltage input for the ACs cannot be changed when used for both ACs
2. VCC voltage scaler for AC is non-linear
Bandgap voltage input for the ACs can not be changed when used for both ACs simultaneously
VCC voltage scaler for AC is non-linear
ADC gain stage cannot be used for single conversion
ADC has increased INL error for some operating conditions
ADC gain stage output range is limited to 2.4 V
ADC Event on compare match non-functional
ADC propagation delay is not correct when 8x -64x gain is used
Bandgap measurement with the ADC is non-functional when VCC is below 2.7V
Accuracy lost on first three samples after switching input to ADC gain stage
Configuration of PGM and CWCM not as described in XMEGA A Manual
PWM is not restarted properly after a fault in cycle-by-cycle mode
BOD: BOD will be enabled at any reset
Sampled BOD in Active mode will cause noise when bandgap is used as reference
EEPROM page buffer always written when NVM DATA0 is written
Pending full asynchronous pin change interrupts will not wake the device
Pin configuration does not affect Analog Comparator Output
NMI Flag for Crystal Oscillator Failure automatically cleared
Flash Power Reduction Mode can not be enabled when entering sleep
Crystal start-up time required after power-save even if crystal is source for RTC
RTC Counter value not correctly read after sleep
Pending asynchronous RTC-interrupts will not wake up device
TWI Transmit collision flag not cleared on repeated start
Clearing TWI Stop Interrupt Flag may lock the bus
TWI START condition at bus timeout will cause transaction to be dropped
TWI Data Interrupt Flag (DIF) erroneously read as set
WDR instruction inside closed window will not issue reset
TWIE is not available
Inverted I/O enable does not affect Analog Comparator Output
simultaneously
If the Bandgap voltage is selected as input for one Analog Comparator (AC) and then
selected/deselected as input for another AC, the first comparator will be affected for up to
1 µs and could potentially give a wrong comparison result.
Problem fix/Workaround
If the Bandgap is required for both ACs simultaneously, configure the input selection for both
ACs before enabling any of them.
The 6-bit VCC voltage scaler in the Analog Comparators is non-linear.
XMEGA D4
90