ATMEGA325A-MU Atmel, ATMEGA325A-MU Datasheet - Page 246
![IC MCU AVR 32K FLASH 64VQFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA325A-MU
Manufacturer Part Number
ATMEGA325A-MU
Description
IC MCU AVR 32K FLASH 64VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA325A-MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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24.5.4
246
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Scanning the Analog Comparator
Table 24-1 on page 246
tors with XTAL1/XTAL2 connections as well as 32kHz Timer Oscillator.
Table 24-1.
Notes:
The relevant Comparator signals regarding Boundary-scan are shown in
246. The Boundary-scan cell from
The signals are described in
The Comparator need not be used for pure connectivity testing, since all analog inputs are
shared with a digital port pin as well.
Figure 24-7. Analog Comparator
Enable Signal
EXTCLKEN
OSCON
OSC32EN
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between
3. The clock configuration is programmed by fuses. As a fuse is not changed run-time, the clock
the internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is
preferred.
configuration is considered fixed for a given application. The user is advised to scan the same
clock option as to be used in the final system. The enable signals are supported in the scan
chain because the system logic can disable clock options in sleep modes, thereby disconnect-
ing the Oscillator pins from the scan path if not provided.
Scan Signals for the Oscillator
ADCEN
ACME
Scanned
Clock Line
EXTCLK (XTAL1)
OSCCK
OSC32CK
ADC MULTIPLEXER
summaries the scan registers for the external clock pin XTAL1, oscilla-
REFERENCE
BANDGAP
OUTPUT
Table 24-2 on page
Figure 24-8 on page 247
ACBG
Clock Option
External Clock
External Crystal
External Ceramic Resonator
Low Freq. External Crystal
(1)(2)(3)
247.
ACD
AC_IDLE
is attached to each of these signals.
Scanned Clock Line
Figure 24-7 on page
ACO
when not Used
8285B–AVR–03/11
0
1
1
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