PIC18F2520-I/ML Microchip Technology, PIC18F2520-I/ML Datasheet - Page 217
![IC PIC MCU FLASH 16KX16 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F2520-I/ML
Manufacturer Part Number
PIC18F2520-I/ML
Description
IC PIC MCU FLASH 16KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2420-IML.pdf
(412 pages)
4.PIC18F2420-IML.pdf
(16 pages)
5.PIC18F2420-IML.pdf
(8 pages)
6.PIC18F2420-IML.pdf
(6 pages)
7.PIC18F2420-IML.pdf
(8 pages)
8.PIC18F2420-IML.pdf
(4 pages)
9.PIC18F4420-IP.pdf
(390 pages)
Specifications of PIC18F2520-I/ML
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Data Rom Size
256 KB
Height
0.88 mm
Length
6 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
6 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP3909RD-3PH1 - REF DESIGN MCP3909 3PH ENGY MTRXLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2520-I/ML
Manufacturer:
MICROCHI
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2420-IML PDF datasheet #3
- PIC18F2420-IML PDF datasheet #4
- PIC18F2420-IML PDF datasheet #5
- PIC18F2420-IML PDF datasheet #6
- PIC18F2420-IML PDF datasheet #7
- PIC18F2420-IML PDF datasheet #8
- PIC18F4420-IP PDF datasheet #9
- Current page: 217 of 390
- Download datasheet (8Mb)
18.2.4.1
Since auto-wake-up functions by sensing rising edge
transitions on RX/DT, information with any state
changes before the Stop bit may signal a false end-of-
character and cause data or framing errors. To work
properly, therefore, the initial character in the transmis-
sion must be all ‘0’s. This can be 00h (8 bytes) for
standard RS-232 devices or 000h (12 bits) for LIN bus.
Oscillator start-up time must also be considered,
especially in applications using oscillators with longer
start-up intervals (i.e., XT or HS mode). The Sync
Break (or Wake-up Signal) character must be of
sufficient length and be followed by a sufficient interval
to allow enough time for the selected oscillator to start
and provide proper initialization of the EUSART.
FIGURE 18-8:
FIGURE 18-9:
2004 Microchip Technology Inc.
Note 1:
RX/DT Line
Note 1:
RX/DT Line
WUE bit
WUE bit
OSC1
OSC1
2:
RCIF
RCIF
(1)
(2)
The EUSART remains in Idle while the WUE bit is set.
If the wake-up event requires long oscillator warm-up time, the auto-clear of the WUE bit can occur before the oscillator is ready. This
sequence should not depend on the presence of Q clocks.
The EUSART remains in Idle while the WUE bit is set.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Special Considerations Using
Auto-Wake-up
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Bit set by user
Bit set by user
Sleep Command Executed
AUTO-WAKE-UP BIT (WUE) TIMINGS DURING NORMAL OPERATION
AUTO-WAKE-UP BIT (WUE) TIMINGS DURING SLEEP
PIC18F2420/2520/4420/4520
Preliminary
Q1
Sleep Ends
18.2.4.2
The timing of WUE and RCIF events may cause some
confusion when it comes to determining the validity of
received data. As noted, setting the WUE bit places the
EUSART in an Idle mode. The wake-up event causes a
receive interrupt by setting the RCIF bit. The WUE bit is
cleared after this when a rising edge is seen on RX/DT.
The interrupt condition is then cleared by reading the
RCREG register. Ordinarily, the data in RCREG will be
dummy data and should be discarded.
The fact that the WUE bit has been cleared (or is still
set) and the RCIF flag is set should not be used as an
indicator of the integrity of the data in RCREG. Users
should consider implementing a parallel method in
firmware to verify received data integrity.
To assure that no actual data is lost, check the RCIDL
bit to verify that a receive operation is not in process. If
a receive operation is not occurring, the WUE bit may
then be set just prior to entering the Sleep mode.
Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Cleared due to user read of RCREG
Cleared due to user read of RCREG
Special Considerations Using
the WUE Bit
Note 1
DS39631A-page 215
Auto-Cleared
Auto-Cleared
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