PIC24HJ64GP504-I/PT Microchip Technology, PIC24HJ64GP504-I/PT Datasheet - Page 346

IC PIC MCU FLASH 64K 44TQFP

PIC24HJ64GP504-I/PT

Manufacturer Part Number
PIC24HJ64GP504-I/PT
Description
IC PIC MCU FLASH 64K 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP504-I/PT

Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
35
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC24
No. Of I/o's
35
Ram Memory Size
4KB
Cpu Speed
40MIPS
No. Of Timers
7
No. Of Pwm Channels
4
Embedded Interface Type
CAN, I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ64GP504-I/PT
Manufacturer:
MICROCHIP
Quantity:
1 001
Part Number:
PIC24HJ64GP504-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE A-2:
DS70293D-page 346
Section 10.0 “Power-Saving
Features”
Section 11.0 “I/O Ports”
Section 16.0 “Serial Peripheral
Interface (SPI)”
Section 18.0 “Universal
Asynchronous Receiver Transmitter
(UART)”
Section 19.0 “Enhanced CAN
(ECAN™) Module”
Section 20.0 “10-bit/12-bit Analog-to-
Digital Converter (ADC1)”
Section 21.0 “Comparator Module”
Section 22.0 “Real-Time Clock and
Calendar (RTCC)”
Section 25.0 “Special Features”
Section Name
MAJOR SECTION UPDATES (CONTINUED)
Added the following registers:
• PMD1: Peripheral Module Disable Control Register 1 (Register 10-1)
• PMD2: Peripheral Module Disable Control Register 2 (Register 10-2)
• PMD3: Peripheral Module Disable Control Register 3 (Register 10-3)
Removed Table 11-1 and added reference to pin diagrams for I/O pin
availability and functionality.
Added paragraph on ADPCFG register default values to Section 11.3
“Configuring Analog Port Pins”.
Added Note box regarding PPS functionality with input mapping to
Section 11.6.2.1 “Input Mapping”.
Added Note 2 and 3 to the SPIxCON1 register (see Register 16-2).
Updated the Notes in the UxMode register (see Register 18-1).
Updated the UTXINV bit settings in the UxSTA register (see
Register 18-2).
Changed bit 11 in the ECAN Control Register 1 (CiCTRL1) to Reserved
(see Register 19-1).
Replaced the ADC1 Module Block Diagrams with new diagrams (see
Figure 20-1 and Figure 20-2).
Updated bit values for ADCS<7:0> and added Notes 1 and 2 to the ADC1
Control Register 3 (AD1CON3) (see Register 20-3).
Added Note 2 to the ADC1 Input Scan Select Register Low (AD1CSSL)
(see Register 20-7).
Added Note 2 to the ADC1 Port Configuration Register Low (AD1PCFGL)
(see Register 20-8).
Updated the Comparator Voltage Reference Block Diagram
(see Figure 21-2).
Updated the minimum positive adjust value for CAL<7:0> in the RTCC
Calibration and Configuration (RCFGCAL) Register (see Register 22-1).
Added Note 1 to the Device Configuration Register Map (see Table 25-1).
Updated Note 1 in the PIC24H Configuration Bits Description (see
Table 25-2).
Preliminary
Update Description
© 2009 Microchip Technology Inc.

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