ATMEGA6450A-AU Atmel, ATMEGA6450A-AU Datasheet - Page 180
![IC MCU AVR 64K FLASH 100TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATMEGA6450A-AU
Manufacturer Part Number
ATMEGA6450A-AU
Description
IC MCU AVR 64K FLASH 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA6450A-AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
69
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
Quantity
Price
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19.7
19.7.1
180
Data Reception – The USART Receiver
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Receiving Frames with 5 to 8 Data Bits
The USART Receiver is enabled by writing the Receive Enable (RXENn) bit in the UCSRnB
Register to one. When the Receiver is enabled, the normal pin operation of the RxD pin is over-
ridden by the USART and given the function as the Receiver’s serial input. The baud rate, mode
of operation and frame format must be set up once before any serial reception can be done. If
synchronous operation is used, the clock on the XCK pin will be used as transfer clock.
The Receiver starts data reception when it detects a valid start bit. Each bit that follows the start
bit will be sampled at the baud rate or XCK clock, and shifted into the Receive Shift Register until
the first stop bit of a frame is received. A second stop bit will be ignored by the Receiver. When
the first stop bit is received, i.e., a complete serial frame is present in the Receive Shift Register,
the contents of the Shift Register will be moved into the receive buffer. The receive buffer can
then be read by reading the UDRn I/O location.
The following code example shows a simple USART receive function based on polling of the
Receive Complete (RXCn) Flag. When using frames with less than eight bits the most significant
bits of the data read from the UDRn will be masked to zero. The USART has to be initialized
before the function can be used.
Note:
The function simply waits for data to be present in the receive buffer by checking the RXCn Flag,
before reading the buffer and returning the value.
Assembly Code Example
C Code Example
USART_Receive:
unsigned char USART_Receive( void )
{
}
; Wait for data to be received
sbis UCSR0A, RXC0
rjmp USART_Receive
; Get and return received data from buffer
in
ret
/* Wait for data to be received */
while ( !(UCSR0A & (1<<RXC0)) )
/* Get and return received data from buffer */
return UDR0;
1.
See ”About Code Examples” on page 9.
r16, UDR0
;
(1)
(1)
8285B–AVR–03/11
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