ATMEGA6450A-AU Atmel, ATMEGA6450A-AU Datasheet - Page 296
ATMEGA6450A-AU
Manufacturer Part Number
ATMEGA6450A-AU
Description
IC MCU AVR 64K FLASH 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA6450A-AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
69
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Part Number
Manufacturer
Quantity
Price
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26.7.13
26.7.14
26.7.15
296
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Reading the Signature Bytes
Reading the Calibration Byte
Parallel Programming Characteristics
Figure 26-6. Mapping Between BS1, BS2 and the Fuse and Lock Bits During Read
The algorithm for reading the Signature bytes is as follows (refer to
page 289
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte (0x00 - 0x02).
3. Set OE to “0”, and BS to “0”. The selected Signature byte can now be read at DATA.
4. Set OE to “1”.
The algorithm for reading the Calibration byte is as follows (refer to
page 289
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte, 0x00.
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.
4. Set OE to “1”.
Figure 26-7. Parallel Programming Timing, Including some General Timing Requirements
(DATA, XA0/1, BS1, BS2)
for details on Command and Address loading):
for details on Command and Address loading):
Data & Contol
Fuse Low Byte
Extended Fuse Byte
RDY/BSY
Fuse High Byte
PAGEL
XTAL1
Lock Bits
WR
t
t
BVPH
DVXH
BS2
BS2
t
t
XHXL
PHPL
0
1
0
1
t
t
t
t
XLWL
XLDX
PLBX
PLWL
t
BVWL
BS1
t
WLWH
WLRL
0
1
”Programming the Flash” on
”Programming the Flash” on
t
WLBX
DATA
8285B–AVR–03/11
t
WLRH
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