PIC18F2550-I/SO Microchip Technology, PIC18F2550-I/SO Datasheet - Page 140

IC PIC MCU FLASH 16KX16 28SOIC

PIC18F2550-I/SO

Manufacturer Part Number
PIC18F2550-I/SO
Description
IC PIC MCU FLASH 16KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2550-I/SO

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI/I2C/EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163025, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Price
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PIC18F2455/2550/4455/4550
13.2
Timer2 can also generate an optional device interrupt.
The Timer2 output signal (TMR2 to PR2 match) pro-
vides the input for the 4-bit output counter/postscaler.
This counter generates the TMR2 match interrupt flag
which is latched in TMR2IF (PIR1<1>). The interrupt is
enabled by setting the TMR2 Match Interrupt Enable
bit, TMR2IE (PIE1<1>).
A range of 16 postscale options (from 1:1 through 1:16
inclusive) can be selected with the postscaler control
bits, T2OUTPS3:T2OUTPS0 (T2CON<6:3>).
FIGURE 13-1:
TABLE 13-1:
DS39632E-page 138
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
Note 1:
Name
T2OUTPS3:T2OUTPS0
T2CKPS1:T2CKPS0
F
OSC
Timer2 Interrupt
Timer2 Register
/4
Timer2 Period Register
SPPIF
SPPIE
SPPIP
These bits are unimplemented on 28-pin devices; always maintain these bits clear.
Bit 7
(1)
(1)
(1)
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
TIMER2 BLOCK DIAGRAM
Internal Data Bus
ADIF
ADIE
ADIP
Bit 6
1:1, 1:4, 1:16
2
Prescaler
TMR0IE
RCIF
RCIE
RCIP
Bit 5
4
TMR2
INT0IE
TXIE
TXIP
Bit 4
TXIF
Reset
8
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
13.3
The unscaled output of TMR2 is available primarily to
the CCP modules, where it is used as a time base for
operations in PWM mode.
Timer2 can be optionally used as the shift clock source
for the MSSP module operating in SPI mode.
Additional information is provided in Section 19.0
“Master Synchronous Serial Port (MSSP) Module”.
Comparator
1:1 to 1:16
Postscaler
8
TMR2/PR2
Match
TMR2 Output
TMR0IF
CCP1IE
CCP1IP
CCP1IF
Bit 2
TMR2IE
TMR2IP
TMR2IF
INT0IF
Bit 1
© 2009 Microchip Technology Inc.
PR2
8
Set TMR2IF
TMR2 Output
(to PWM or MSSP)
TMR1IE
TMR1IP
TMR1IF
RBIF
Bit 0
on page
Values
Reset
53
56
56
56
54
54
54

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