PIC18F442-E/P Microchip Technology, PIC18F442-E/P Datasheet - Page 117
PIC18F442-E/P
Manufacturer Part Number
PIC18F442-E/P
Description
IC MCU CMOS 40MHZ 8K FLASH 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F442-E/P
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F442-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 117 of 332
- Download datasheet (6Mb)
13.2
The Timer1 oscillator may be used as the clock source
for Timer3. The Timer1 oscillator is enabled by setting
the T1OSCEN (T1CON<3>) bit. The oscillator is a low
power oscillator rated up to 200 KHz. See Section 11.0
for further details.
13.3
The TMR3 Register pair (TMR3H:TMR3L) increments
from 0000h to FFFFh and rolls over to 0000h. The
TMR3 Interrupt, if enabled, is generated on overflow,
which is latched in interrupt flag bit, TMR3IF
(PIR2<1>). This interrupt can be enabled/disabled by
setting/clearing TMR3 interrupt enable bit, TMR3IE
(PIE2<1>).
TABLE 13-1:
© 2006 Microchip Technology Inc.
INTCON
PIR2
PIE2
IPR2
TMR3L
TMR3H
T1CON
T3CON
Legend:
Name
Timer1 Oscillator
Timer3 Interrupt
x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Timer1 module.
Holding Register for the Least Significant Byte of the 16-bit TMR3 Register
Holding Register for the Most Significant Byte of the 16-bit TMR3 Register
GIEH
RD16
RD16
Bit 7
GIE/
—
—
—
REGISTERS ASSOCIATED WITH TIMER3 AS A TIMER/COUNTER
T3CCP2
PEIE/
Bit 6
GIEL
—
—
—
—
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
T3CKPS1 T3CKPS0
TMR0IE
Bit 5
—
—
—
INT0IE
EEIF
EEIE
EEIP
Bit 4
T3CCP1
BCLIE
BCLIP
BCLIF
RBIE
Bit 3
T3SYNC
TMR0IF
13.4
If the CCP module is configured in Compare mode to
generate a “special event trigger” (CCP1M3:CCP1M0
= 1011), this signal will reset Timer3.
Timer3 must be configured for either Timer or Synchro-
nized Counter mode to take advantage of this feature.
If Timer3 is running in Asynchronous Counter mode,
this RESET operation may not work. In the event that a
write to Timer3 coincides with a special event trigger
from CCP1, the write will take precedence. In this mode
of operation, the CCPR1H:CCPR1L registers pair
effectively becomes the period register for Timer3.
LVDIE
LVDIP
LVDIF
Bit 2
Note:
Resetting Timer3 Using a CCP
Trigger Output
TMR1CS TMR1ON 0-00 0000 u-uu uuuu
TMR3CS TMR3ON 0000 0000 uuuu uuuu
TMR3IF
TMR3IE
TMR3IP
INT0IF
The special event triggers from the CCP
module will not set interrupt flag bit,
TMR3IF (PIR1<0>).
Bit 1
CCP2IE
CCP2IP
CCP2IF
RBIF
Bit 0
PIC18FXX2
0000 000x 0000 000u
---0 0000 ---0 0000
---0 0000 ---0 0000
---1 1111 ---1 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
POR, BOR
Value on
DS39564C-page 115
All Other
Value on
RESETS
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