AT91SAM7S321-AU Atmel, AT91SAM7S321-AU Datasheet - Page 322

• Manufacturer Part Number: AT91SAM7S321-AU
• Description: IC ARM7 MCU FLASH 32K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S321-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, I2S, SPI, SSC, TWI, UART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 10 bit
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AT91SAM7xxxx
• No. Of I/o's: 32
• Ram Memory Size: 8KB
• Cpu Speed: 55MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 30-11. Master Write with One, Two or Three Bytes Internal Address and One Data Byte
Figure 30-12. Master Read with One, Two or Three Bytes Internal Address and One Data Byte
30.7.6.2
322
TWD
TWD
TWD
TWD
TWD
TWD
Three bytes internal address
Two bytes internal address
One byte internal address
Three bytes internal address
Two bytes internal address
One byte internal address
S
S
S
AT91SAM7S Series Preliminary
S
S
S
10-bit Slave Addressing
DADR
DADR
DADR
DADR
DADR
DADR
W
W
W
In the figures below the following abbreviations are used:
For a slave address higher than 7 bits, the user must configure the address size (IADRSZ) and
set the other slave address bits in the internal address register (TWI_IADR). The two remaining
Internal address bytes, IADR[15:8] and IADR[23:16] can be used the same as in 7-bit Slave
Addressing.
Example: Address a 10-bit device (10-bit device address is b1 b2 b3 b4 b5 b6 b7 b8 b9 b10)
1. Program IADRSZ = 1,
2. Program DADR with 1 1 1 1 0 b1 b2 (b1 is the MSB of the 10-bit address, b2, etc.)
3. Program TWI_IADR with b3 b4 b5 b6 b7 b8 b9 b10 (b10 is the LSB of the 10-bit
4.
• S
• Sr
• P
• W
• R
• A
• N
• DADR
• IADR
W
W
W
A
A
A
address)
IADR(23:16)
A
A
A
IADR(15:8)
IADR(7:0)
Start
Repeated Start
Stop
Write
Read
Acknowledge
Not Acknowledge
Device Address
Internal Address
IADR(23:16)
IADR(15:8)
IADR(7:0)
A
A
A
IADR(15:8)
Sr
IADR(7:0)
A
A
A
DADR
IADR(15:8)
IADR(7:0)
DATA
R
A
A
Sr
IADR(7:0)
A
A
A
A
DADR
IADR(7:0)
P
DATA
DATA
A
Sr
R
A
A
N
A
DADR
DATA
P
P
DATA
DATA
6175K–ATARM–30-Aug-10
R
N
P
A
N
A
P
P