ATMEGA644A-PU Atmel, ATMEGA644A-PU Datasheet - Page 320
![IC MCU AVR 64K FLASH 40PDIP](/photos/6/70/67049/453-40-dip_sml.jpg)
ATMEGA644A-PU
Manufacturer Part Number
ATMEGA644A-PU
Description
IC MCU AVR 64K FLASH 40PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644A-PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG, TWI, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 26-18. JTAG Programming Instruction (Continued)
8272A–AVR–01/10
Instruction
5a. Enter EEPROM Read
5b. Load Address High Byte
5c. Load Address Low Byte
5d. Read Data Byte
6a. Enter Fuse Write
6b. Load Data Low Byte
6c. Write Fuse Extended Byte
6d. Poll for Fuse Write Complete
6e. Load Data Low Byte
6f. Write Fuse High Byte
6g. Poll for Fuse Write Complete
6h. Load Data Low Byte
6i. Write Fuse Low Byte
6j. Poll for Fuse Write Complete
7a. Enter Lock Bit Write
7b. Load Data Byte
7c. Write Lock Bits
7d. Poll for Lock Bit Write complete
8a. Enter Fuse/Lock Bit Read
8b. Read Extended Fuse Byte
8c. Read Fuse High Byte
8d. Read Fuse Low Byte
Set (Continued)
o = data out, i = data in, x = don’t care
(9)
(6)
(7)
(7)
(8)
(7)
164A/164PA/324A/324PA/644A/644PA/1284/1284P
(6)
a = address high bits, b = address low bits, c = address extended bits, H = 0 - Low byte, 1 - High Byte,
TDI Sequence
0100011_00000011
0000111_aaaaaaaa
0000011_bbbbbbbb
0110011_bbbbbbbb
0110010_00000000
0110011_00000000
0100011_01000000
0010011_iiiiiiii
0111011_00000000
0111001_00000000
0111011_00000000
0111011_00000000
0010011_iiiiiiii
0110111_00000000
0110101_00000000
0110111_00000000
0110111_00000000
0010011_iiiiiiii
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0100011_00100000
0010011_11iiiiii
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0100011_00000100
0111010_00000000
0111011_00000000
0111110_00000000
0111111_00000000
0110010_00000000
0110011_00000000
0110111_00000000
0110111_00000000
0110011_00000000
0110011_00000000
TDO Sequence
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
Notes
(10)
(3)
(1)
(2)
(3)
(1)
(2)
(3)
(1)
(2)
(4)
(1)
(2)
320
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