DSPIC30F4012-30I/SP Microchip Technology, DSPIC30F4012-30I/SP Datasheet - Page 162
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DSPIC30F4012-30I/SP
Manufacturer Part Number
DSPIC30F4012-30I/SP
Description
IC DSPIC MCU/DSP 48K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F4012-30ISO.pdf
(238 pages)
2.DSPIC30F4012-30ISO.pdf
(18 pages)
3.DSPIC30F4012-30ISO.pdf
(6 pages)
4.DSPIC30F4012-30ISO.pdf
(16 pages)
5.DSPIC30F4012-30ISO.pdf
(22 pages)
6.DSPIC30F4011-30IP.pdf
(228 pages)
Specifications of DSPIC30F4012-30I/SP
Program Memory Type
FLASH
Program Memory Size
48KB (16K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
20
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F401230ISP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F4012-30I/SP
Manufacturer:
TI
Quantity:
17 600
Part Number:
DSPIC30F4012-30I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC30F4011/4012
TABLE 22-2:
DS70135C-page 160
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Base
Instr
#
SFTAC
SL
SUB
SUBB
SUBR
SUBBR
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
ULNK
XOR
ZE
Mnemonic
Assembly
SFTAC
SFTAC
SL
SL
SL
SL
SL
SUB
SUB
SUB
SUB
SUB
SUB
SUBB
SUBB
SUBB
SUBB
SUBB
SUBR
SUBR
SUBR
SUBR
SUBBR
SUBBR
SUBBR
SUBBR
SWAP.b
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
ULNK
XOR
XOR
XOR
XOR
XOR
ZE
INSTRUCTION SET OVERVIEW (CONTINUED)
Acc,Wn
Acc,#Slit6
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
Acc
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
Wn
Wn
Ws,Wd
Ws,Wd
Ws,Wd
Ws,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
Ws,Wnd
Assembly Syntax
Preliminary
Arithmetic Shift Accumulator by (Wn)
Arithmetic Shift Accumulator by Slit6
f = Left Shift f
WREG = Left Shift f
Wd = Left Shift Ws
Wnd = Left Shift Wb by Wns
Wnd = Left Shift Wb by lit5
Subtract Accumulators
f = f - WREG
WREG = f - WREG
Wn = Wn - lit10
Wd = Wb - Ws
Wd = Wb - lit5
f = f - WREG - (C)
WREG = f - WREG - (C)
Wn = Wn - lit10 - (C)
Wd = Wb - Ws - (C)
Wd = Wb - lit5 - (C)
f = WREG - f
WREG = WREG - f
Wd = Ws - Wb
Wd = lit5 - Wb
f = WREG - f - (C)
WREG = WREG -f - (C)
Wn = nibble swap Wn
Wn = byte swap Wn
Read Prog<23:16> to Wd<7:0>
Read Prog<15:0> to Wd
Write Ws<7:0> to Prog<23:16>
Write Ws to Prog<15:0>
Unlink frame pointer
f = f .XOR. WREG
WREG = f .XOR. WREG
Wd = lit10 .XOR. Wd
Wd = Wb .XOR. Ws
Wd = Wb .XOR. lit5
Wnd = Zero-Extend Ws
Wd = Ws - Wb - (C)
Wd = lit5 - Wb - (C)
Description
2005 Microchip Technology Inc.
words
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
cycle
# of
s
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
1
1
1
1
1
1
1
OA,OB,OAB,
OA,OB,OAB,
C,N,OV,Z
C,N,OV,Z
N,Z
N,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
None
N,Z
N,Z
N,Z
C,Z,N
SA,SB,SAB
SA,SB,SAB
C,N,OV,Z
OA,OB,OAB,
SA,SB,SAB
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
None
None
None
None
None
None
N,Z
N,Z
Status Flags
Affected