PIC18LF2523-I/ML Microchip Technology, PIC18LF2523-I/ML Datasheet - Page 35
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PIC18LF2523-I/ML
Manufacturer Part Number
PIC18LF2523-I/ML
Description
IC PIC MCU FLASH 16KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
Specifications of PIC18LF2523-I/ML
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
TABLE 5-3:
2010 Microchip Technology Inc.
CP2
CP1
CP0
CPD
CPB
WRT5
WRT4
WRT3
WRT2
WRT1
WRT0
WRTD
WRTB
WRTC
Note 1:
Bit Name
2:
The BBSIZ bits, BBSIZ<1:0> and BBSIZ<2:1> bits, cannot be changed once any of the following
code-protect bits are enabled: CPB or CP0, WRTB or WRT0, EBTRB or EBTR0.
Not available in PIC18FXX8X and PIC18F2450/4450 devices.
PIC18F2XXX/4XXX FAMILY BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG5H
CONFIG5H
CONFIG6H
CONFIG6H
CONFIG6H
CONFIG5L
CONFIG5L
CONFIG5L
CONFIG6L
CONFIG6L
CONFIG6L
CONFIG6L
CONFIG6L
CONFIG6L
Words
Code Protection bit (Block 2 code memory area)
1 = Block 2 is not code-protected
0 = Block 2 is code-protected
Code Protection bit (Block 1 code memory area)
1 = Block 1 is not code-protected
0 = Block 1 is code-protected
Code Protection bit (Block 0 code memory area)
1 = Block 0 is not code-protected
0 = Block 0 is code-protected
Code Protection bit (Data EEPROM)
1 = Data EEPROM is not code-protected
0 = Data EEPROM is code-protected
Code Protection bit (Boot Block memory area)
1 = Boot Block is not code-protected
0 = Boot Block is code-protected
Write Protection bit (Block 5 code memory area)
(PIC18F2685 and PIC18F4685 devices only)
1 = Block 5 is not write-protected
0 = Block 5 is write-protected
Write Protection bit (Block 4 code memory area)
(PIC18F2682/2685 and PIC18F4682/4685 devices only)
1 = Block 4 is not write-protected
0 = Block 4 is write-protected
Write Protection bit (Block 3 code memory area)
1 = Block 3 is not write-protected
0 = Block 3 is write-protected
Write Protection bit (Block 2 code memory area)
1 = Block 2 is not write-protected
0 = Block 2 is write-protected
Write Protection bit (Block 1 code memory area)
1 = Block 1 is not write-protected
0 = Block 1 is write-protected
Write Protection bit (Block 0 code memory area)
1 = Block 0 is not write-protected
0 = Block 0 is write-protected
1 = Data EEPROM is not write-protected
0 = Data EEPROM is write-protected
Write Protection bit (Boot Block memory area)
1 = Boot Block is not write-protected
0 = Boot Block is write-protected
Write Protection bit (Configuration registers)
1 = Configuration registers are not write-protected
0 = Configuration registers are write-protected
Write Protection bit (Data EEPROM)
PIC18F2XXX/4XXX FAMILY
Description
DS39622L-page 35