DSPIC30F6014A-20E/PT Microchip Technology, DSPIC30F6014A-20E/PT Datasheet - Page 140

• Manufacturer Part Number: DSPIC30F6014A-20E/PT
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6014A-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 144KB (48K x 24)
• Package / Case: 80-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 68
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F6011A/6012A/6013A/6014A
FIGURE 19-3:
19.8
The analog input model of the 12-bit ADC is shown in
Figure 19-4. The total sampling time for the ADC is a
function of the internal amplifier settling time and the
holding capacitor charge time.
For the ADC to meet its specified accuracy, the charge
holding capacitor (C
charge to the voltage level on the analog input pin. The
source impedance (R
(R
FIGURE 19-4:
DS70143C-page 138
IC
Instruction Execution BSET ADCON1, ASAM
) and the internal sampling switch (R
ADCBUF0
ADCBUF1
ADCLK
DONE
SAMP
ADC Acquisition Requirements
Note: C
Legend: C
VA
PIN
HOLD
Rs
S
value depends on device package and is not tested. Effect of C
CONVERTING 1 CHANNEL AT 200 KSPS, AUTO-SAMPLE START, 1 T
SAMPLING TIME
12-BIT ADC ANALOG INPUT MODEL
), the interconnect impedance
V
I leakage
R
R
C
ANx
) must be allowed to fully
T
PIN
IC
SS
HOLD
C
PIN
= 1 T
T
SAMP
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch resistance
= sample/hold capacitance (from DAC)
AD
various junctions
V
SS
DD
V
) imped-
V
T
T
= 0.6V
= 0.6V
Preliminary
= 14 T
T
CONV
AD
R
I leakage
= 1 T
T
IC
SAMP
500 nA
AD
250
ance combine to directly affect the time required to
charge the capacitor C
of the analog sources must therefore be small enough
to fully charge the holding capacitor within the chosen
sample time. To minimize the effects of pin leakage
currents on the accuracy of the ADC, the maximum
recommended source impedance, R
the analog input channel is selected (changed), this
sampling function must be completed prior to starting
the conversion. The internal holding capacitor will be in
a discharged state prior to each sample operation.
Sampling
Switch
R
SS
= 14 T
PIN
T
CONV
R
negligible if Rs
SS
V
AD
SS
C
= DAC capacitance
= 18 pF
HOLD
HOLD
3 k
© 2006 Microchip Technology Inc.
. The combined impedance
2.5 k .
S
, is 2.5 k . After
AD