AT89C51RC2-3CSUM Atmel, AT89C51RC2-3CSUM Datasheet - Page 96

• Manufacturer Part Number: AT89C51RC2-3CSUM
• Description: IC 8051 MCU FLASH 32K 40DIP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RC2-3CSUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: SPI/UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Cpu Family: AT89
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 60MHz
• Total Internal Ram Size: 1.25KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Functional Description
Software Security Bits (SSB)
96
AT89C51RB2/RC2
The SSB protects any Flash access from ISP command.
The command "Program Software Security bit" can only write a higher priority level.
There are three levels of security:
•
This is the default level.
From level 0, one can write level 1 or level 2.
•
For this level it is impossible to write in the Flash memory, BSB and SBV.
The Bootloader returns ’P’ on write access.
From level 1, one can write only level 2.
•
The level 2 forbids all read and write accesses to/from the Flash/EEPROM memory.
The Bootloader returns ’L’ on read or write access.
Only a full chip erase in parallel mode (using a programmer) or ISP command can reset
the software security bits.
From level 2, one cannot read and write anything.
Table 71. Software Security Byte Behavior
Flash/EEPROM
Bootloader Info
Full-chip Erase
Manufacturer
Blank Check
Erase Block
BSB & SBV
level 0: NO_SECURITY (FFh)
level 1: WRITE_SECURITY (FEh )
level 2: RD_WR_SECURITY (FCh
Fuse Bit
SSB
Info
Read only access allowed
Read only access allowed
Any access allowed
Any access allowed
Any access allowed
Any access allowed
Level 0
Allowed
Allowed
Allowed
Read only access allowed
Read only access allowed
Read only access allowed
Read only access allowed
Read only access allowed
Write level 2 allowed
Not allowed
Level 1
Allowed
Allowed
Read only access allowed
Read only access allowed
Read only access allowed
Any access not allowed
Any access not allowed
Any access not allowed
Not allowed
Level 2
Allowed
Allowed
4180E–8051–10/06