PIC18F6627-I/PT Microchip Technology, PIC18F6627-I/PT Datasheet - Page 26

• Manufacturer Part Number: PIC18F6627-I/PT
• Description: IC PIC MCU FLASH 48KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6627-I/PT

• Core Size: 8-Bit
• Program Memory Size: 96KB (48K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 54
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.84375KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Details

PIC18F872X FAMILY
4.2
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. Memory reads occur a single byte
at a time, so two bytes must be read to compare
against the word in the programmer’s buffer. Refer to
Section 4.1 “Read Code Memory, ID Locations and
Configuration Bits” for implementation details of
reading code memory.
FIGURE 4-2:
DS39643C-page 26
Verify Code Memory and
ID Locations
No
with Post-Increment
with Post-Increment
Set TBLPTR = 0
Read High Byte
Read Low Byte
Word = Expect
code memory
verified?
Data?
Does
Start
VERIFY CODE MEMORY FLOW
All
Yes
Yes
No
Failure,
Report
Error
Increment
Pointer
The Table Pointer must be manually set to 200000h
(base address of the ID locations) once the code
memory has been verified. The post-increment feature
of the table read 4-bit command may not be used to
increment the Table Pointer beyond the code memory
space. In a 128-Kbyte device, for example, a
post-increment read of address, 1FFFFh, will wrap the
Table Pointer back to 000000h, rather than point to
unimplemented address, 020000h.
No
Set TBLPTR = 200000h
with Post-Increment
with Post-Increment
Read High Byte
Read Low Byte
Word = Expect
ID locations
verified?
Data?
Done
Does
All
© 2009 Microchip Technology Inc.
Yes
Yes
No
Failure,
Report
Error