PIC17C752-33E/L Microchip Technology, PIC17C752-33E/L Datasheet - Page 165

• Manufacturer Part Number: PIC17C752-33E/L
• Description: IC MCU CMOS 33MHZ 8K EPRM 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C752-33E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: OTP
• Ram Size: 454 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 68-PLCC
• Processor Series: PIC17C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 678 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000, DM173001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.2.13
An acknowledge sequence is enabled by setting the
acknowledge
(SSPCON2<4>). When this bit is set, the SCL pin is
pulled low and the contents of the acknowledge data bit
is presented on the SDA pin. If the user wishes to gen-
erate an acknowledge, then the ACKDT bit should be
cleared. If not, the user should set the ACKDT bit
before starting an acknowledge sequence. The baud
rate generator then counts for one rollover period
(T
When the SCL pin is sampled high (clock arbitration),
the baud rate generator counts for T
is then pulled low. Following this, the ACKEN bit is
automatically cleared, the baud rate generator is turned
off and the SSP module then goes into IDLE mode
(Figure 15-29).
FIGURE 15-29:
BRG
2000 Microchip Technology Inc.
), and the SCL pin is de-asserted (pulled high).
ACKNOWLEDGE SEQUENCE
TIMING
SSPIF
Note: T
Acknowledge Sequence Starts Here,
sequence
SDA
SCL
ACKNOWLEDGE SEQUENCE WAVEFORM
Set SSPIF at the End
of Receive
BRG
= one baud rate generator period.
ACKEN = 1, ACKDT = 0
enable
Write to SSPCON2
BRG
bit,
. The SCL pin
8
D0
ACKEN
Cleared in
Software
T
BRG
ACK
15.2.13.1
If the user writes the SSPBUF when an acknowledge
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
T
BRG
9
Set SSPIF at the End
of Acknowledge Sequence
ACKEN Automatically Cleared
WCOL Status Flag
Cleared in
Software
PIC17C7XX
DS30289B-page 165