AT91SAM7X256B-AU Atmel, AT91SAM7X256B-AU Datasheet - Page 44

• Manufacturer Part Number: AT91SAM7X256B-AU
• Description: IC MCU 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7X256B-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 55 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 62
• Interface Type: CAN/Ethernet/SPI/I2S/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Controller Family/series: AT91SAM7xxxxx
• No. Of I/o's: 62
• Ram Memory Size: 64KB
• Cpu Speed: 55MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Cpu Family: 91S
• Device Core Size: 32b
• Frequency (max): 55MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 62
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Table 12-2.
44
Doc. Rev
6120ES
6120FS
AT91SAM7X512/256/128 Preliminary
Revision History
Comments
“Features”
Section 10.8 ”Two-wire
Section 7.4 ”Peripheral DMA
Section 10.11 ”Timer
Section 10.15 ”Analog-to-Digital
Section 6.1 ”JTAG Port Pins”, Section 6.2 ”Test Pin”
Section 8.4.3 ”Internal Flash”,
before the Remap Command.”
Figure 9-1,”System Controller Block Diagram”,
”Features”,
Communication”
Section 12. ”Ordering
Table 3-1, “Signal Description List”
,TWI updated to include Atmel TWI compatibility with I2C Standard.
”Debug Unit
Counter”, The TC has Two output compare or one input capture per channel.
Information”, MLR B parts added to ordering information.
Interface”, updated.
(DBGU)”, added
Controller”, added PDC priority list.
updated: “At any time, the Flash is mapped ... if GPNVM bit 2 is set and
Converter”, INL and DNL updated.
footnote added to JTAGSEL, ERASE and TST pin comments.
”Mode for General Purpose 2-wire UART Serial
RTT is reset by power_on_reset.
and
Section 6.4 ”ERASE Pin”,
updated.
6120FS–ATARM–17-Feb-09
Change
Request
Ref.
4247
4774
4210
4007
5064
5850
5223
5846
6064