ATSAM3U4CA-AU Atmel, ATSAM3U4CA-AU Datasheet - Page 220
ATSAM3U4CA-AU
Manufacturer Part Number
ATSAM3U4CA-AU
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U4CA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
57
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b, 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
3xUSART, TWI, 4xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
57
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Controller Family/series
SAM3U
No. Of I/o's
57
Ram Memory Size
52KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Region enable bit.
For information about access permission, see
13.22.5.1
13.22.6
220
SAM3U Series
MPU access permission attributes
SIZE field values
The SIZE field defines the size of the MPU memory region specified by the RNR. as follows:
The smallest permitted region size is 32B, corresponding to a SIZE value of 4.
example SIZE values, with the corresponding region size and value of N in the RBAR.
Table 13-36. Example SIZE field values
1.
This section describes the MPU access permission attributes. The access permission bits, TEX,
C, B, S, AP, and XN, of the RASR, control access to the corresponding memory region. If an
access is made to an area of memory without the required permissions, then the MPU generates
a permission fault.
Table 13-37
Table 13-37. TEX, C, B, and S encoding
SIZE value
b00100 (4)
b01001 (9)
b10011 (19)
b11101 (29)
b11111 (31)
TEX
b000
In the RBAR, see
(Region size in bytes) = 2
C
0
1
page
shows the encodings for the TEX, C, B, and S access permission bits.
B
0
1
0
1
Region size
32B
1KB
1MB
1GB
4GB
218.
“MPU access permission
S
x
x
0
1
0
1
(1)
(1)
“MPU Region Base Address Register” on
Memory type
Strongly-
ordered
Device
Normal
Normal
Value of
N
5
10
20
30
b01100
(1)
(SIZE+1)
Shareability
Shareable
Shareable
Not
shareable
Shareable
Not
shareable
Shareable
Note
Minimum permitted
size
-
-
-
Maximum possible
size
attributes”.
Other attributes
-
-
Outer and inner write-through. No write
allocate.
Outer and inner write-back. No write
allocate.
6430D–ATARM–25-Mar-11
Table 13-36
gives
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