P80C32X2BBD,157 NXP Semiconductors, P80C32X2BBD,157 Datasheet - Page 16

• Manufacturer Part Number: P80C32X2BBD,157
• Description: IC 80C51 MCU 256 ROMLESS 44LQFP
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C32X2BBD,157

• Program Memory Type: ROMless
• Package / Case: 44-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR
• Number Of I /o: 32
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: P80C3x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 33MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 256Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935272087157; P80C32X2BBD; P80C32X2BBD

Philips Semiconductors
2003 Jan 24
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
*d = 6 in 6-clock mode; d = 12 in 12-clock mode.
TCON
Timer n
Gate bit
INTn Pin
BIT
TCON.7
TCON.6
TCON.5
TCON.4
TCON.3
TCON.2
TCON.1
TCON.0
OSC
Address = 88H
Bit Addressable
Tn Pin
SYMBOL
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
TRn
d*
TF1
FUNCTION
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or clearing the bit in software.
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or by clearing the bit in software.
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Interrupt 1 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
Interrupt 0 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level
triggered external interrupts.
7
Figure 4. Timer/Counter 0/1 Mode 2: 8-Bit Auto-Reload
Figure 3. Timer/Counter 0/1 Control (TCON) Register
TR1
6
C/T = 0
C/T = 1
TF0
5
TR0
4
Control
16
IE1
3
IT1
2
(8 Bits)
(8 Bits)
TLn
THn
IE0
Reload
1
P80C3xX2; P80C5xX2;
IT0
0
Reset Value = 00H
TFn
SU01619
Interrupt
P87C5xX2
SU01516
Product data