P87C51X2BBD,157 NXP Semiconductors, P87C51X2BBD,157 Datasheet - Page 34
![IC 80C51 MCU 128 RAM 44LQFP](/photos/12/13/121370/44-lqfp_sml.jpg)
P87C51X2BBD,157
Manufacturer Part Number
P87C51X2BBD,157
Description
IC 80C51 MCU 128 RAM 44LQFP
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheet
1.P87C52X2BN112.pdf
(62 pages)
Specifications of P87C51X2BBD,157
Program Memory Type
OTP
Program Memory Size
4KB (4K x 8)
Package / Case
44-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR
Number Of I /o
32
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
UART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM10064 - EMULATOR 80C51 PDS51-MK2
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935271374157
P87C51X2BBD
P87C51X2BBD
P87C51X2BBD
P87C51X2BBD
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P87C51X2BBD,157
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
2003 Jan 24
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
IPH
IP
IE
BIT
IE.7
IE.6
IE.5
IE.4
IE.3
IE.2
IE.1
IE.0
BIT
IP.7
IP.6
IP.5
IP.4
IP.3
IP.2
IP.1
IP.0
BIT
IPH.7
IPH.6
IPH.5
IPH.4
IPH.3
IPH.2
IPH.1
IPH.0
Address = B7H
Bit Addressable
Address = 0B8H
Bit Addressable
Address = 0A8H
Bit Addressable
SYMBOL
EA
—
ET2
ES
ET1
EX1
ET0
EX0
SYMBOL
—
—
PT2
PS
PT1
PX1
PT0
PX0
SYMBOL
—
—
PT2H
PSH
PT1H
PX1H
PT0H
PX0H
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables it.
Priority Bit = 1 assigns higher priority
Priority Bit = 0 assigns lower priority
Priority Bit = 1 assigns higher priority
Priority Bit = 0 assigns lower priority
FUNCTION
Global disable bit. If EA = 0, all interrupts are disabled. If EA = 1, each interrupt can be individually
enabled or disabled by setting or clearing its enable bit.
Not implemented. Reserved for future use.
Timer 2 interrupt enable bit.
Serial Port interrupt enable bit.
Timer 1 interrupt enable bit.
External interrupt 1 enable bit.
Timer 0 interrupt enable bit.
External interrupt 0 enable bit.
FUNCTION
Not implemented, reserved for future use.
Not implemented, reserved for future use.
Timer 2 interrupt priority bit.
Serial Port interrupt priority bit.
Timer 1 interrupt priority bit.
External interrupt 1 priority bit.
Timer 0 interrupt priority bit.
External interrupt 0 priority bit.
FUNCTION
Not implemented, reserved for future use.
Not implemented, reserved for future use.
Timer 2 interrupt priority bit high.
Serial Port interrupt priority bit high.
Timer 1 interrupt priority bit high.
External interrupt 1 priority bit high.
Timer 0 interrupt priority bit high.
External interrupt 0 priority bit high.
EA
—
—
7
7
7
—
—
—
6
6
6
Figure 24. Interrupt Priority HIGH (IPH) Register
Figure 23. Interrupt Priority (IP) Register
Figure 22. Interrupt Enable (IE) Register
PT2H
ET2
PT2
5
5
5
PSH
ES
PS
4
4
4
34
PT1H
ET1
PT1
3
3
3
PX1H
EX1
PX1
2
2
2
PT0H
ET0
PT0
1
1
1
P80C3xX2; P80C5xX2;
SU01523
PX0H
EX0
PX0
0
0
0
SU01524
Reset Value = xx000000B
Reset Value = xx000000B
Reset Value = 0X000000B
P87C5xX2
SU01522
Product data