P89LV51RC2FBC,557 NXP Semiconductors, P89LV51RC2FBC,557 Datasheet - Page 48

• Manufacturer Part Number: P89LV51RC2FBC,557
• Description: IC 80C51 MCU 512 RAM 44TQFP
• Manufacturer: NXP Semiconductors
• Series: 89LVr

Specifications of P89LV51RC2FBC,557

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LV5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1017 - BOARD 44-ZIF PLCC SOCKET622-1008 - BOARD FOR LPC9103 10-HVSON
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935277724557; P89LV51RC2FBC; P89LV51RC2FBC

NXP Semiconductors
P89LV51RB2_RC2_RD2_5
Product data sheet
Fig 21. PCA interrupt system
PCA TIMER/COUNTER
MODULE0
MODULE1
MODULE2
MODULE3
MODULE4
CMOD.0
Table 35.
Not bit addressable; reset value: 00H.
Table 36.
Bit
7
6
5 to 3
2 to 1
0
Bit
Symbol
ECF
CMOD - PCA counter mode register (address D9H) bit allocation
CMOD - PCA counter mode register (address D9H) bit descriptions
Symbol
CIDL
WDTE
-
CPS1,
CPS0
ECF
CIDL
7
CCAPMn.0
Rev. 05 — 15 December 2009
WDTE
CF
Description
Counter Idle Control: CIDL = 0 programs the PCA Counter to continue
functioning during Idle mode. CIDL = 1 programs it to be gated off
during idle.
Watchdog Timer Enable: WDTE = 0 disables watchdog timer function
on module 4. WDTE = 1 enables it.
Reserved for future use. Should be set to
PCA Count Pulse Select (see
PCA Enable Counter Overflow Interrupt: ECF = 1 enables CF bit in
CCON to generate an interrupt. ECF = 0 disables that function.
6
CR
ECCFn
5
-
-
P89LV51RB2/RC2/RD2
CCF4
4
-
CCF3
8-bit microcontrollers with 80C51 core
Table 37
CCF2
IE.6
3
-
EC
below).
CCF1
CPS1
‘0’
2
IE.7
by user programs.
EA
CCF0
© NXP B.V. 2009. All rights reserved.
CPS0
CCON
(D8H)
to
interrupt
priority
decoder
1
002aaa533
ECF
48 of 76
0