ST7FLITEU09M3TR STMicroelectronics, ST7FLITEU09M3TR Datasheet - Page 66

• Manufacturer Part Number: ST7FLITEU09M3TR
• Description: IC MCU 8BIT 2K FLASH 8SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEU09M3TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: ST7FLITEUx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: ICC
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• For Use With: 497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Details

I/O ports
10.3
10.4
Table 22.
10.5
10.6
66/139
Wait
Halt
Mode
Unused I/O pins
Unused I/O pins must be connected to fixed voltage levels. Refer to
109.
Low power modes
Effect of low power modes on I/O ports
Interrupts
The external interrupt event generates an interrupt if the corresponding configuration is
selected with DDR and OR registers and the interrupt mask in the CC register is not active
(RIM instruction).
Table 23.
I/O port implementation
The hardware implementation on each I/O port depends on the settings in the DDR and OR
registers and specific feature of the I/O port such as ADC Input or true open drain.
Switching these I/O ports from one state to another should be done in a sequence that
prevents unwanted side effects. Recommended safe transitions are illustrated in
Other transitions are potentially risky and should be avoided, since they are likely to present
unwanted side-effects such as spurious interrupt generation.
Figure 33. Interrupt I/O port state transitions
External interrupt on selected
external event
No effect on I/O ports. External interrupts cause the device to exit from Wait mode.
No effect on I/O ports. External interrupts cause the device to exit from Halt mode.
Interrupt event
Description of interrupt events
floating/pull-up
interrupt
INPUT
01
(reset state)
Event
floating
INPUT
flag
00
-
Description
open-drain
OUTPUT
10
XX
Enable
control
DDRx
ORx
bit
= DDR, OR
OUTPUT
push-pull
11
ST7LITEU05 ST7LITEU09
Section 13.8 on page
from
Wait
Exit
Yes
Figure
from
Exit
Halt
Yes
33.