ST7FLIT10BF0M6 STMicroelectronics, ST7FLIT10BF0M6 Datasheet - Page 139
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ST7FLIT10BF0M6
Manufacturer Part Number
ST7FLIT10BF0M6
Description
IC MCU 8BIT 2K FLASH 20-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLIT15BY1M6.pdf
(159 pages)
Specifications of ST7FLIT10BF0M6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7FLIT1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
13.11 10-BIT ADC CHARACTERISTICS
Subject to general operating condition for V
Figure 110. Typical Application with ADC
Notes:
1. Unless otherwise specified, typical data are based on T
lines and are not tested.
2. When V
3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10kΩ). Data
based on characterization results, not tested in production.
4. The stabilization time of the AD converter is masked by the first t
always valid.
Related application notes:
Understanding and minimizing ADC conversion errors (AN1636)
Software techniques for compensating ST7 ADC errors (AN1711)
Symbol
C
t
R
f
V
t
I
STAB
ADC
ADC
ADC
ADC
AIN
AIN
DDA
ADC clock frequency
Conversion voltage range
External input resistor
Internal sample and hold capacitor
Stabilization time after ADC enable
Conversion time (Sample+Hold)
- Sample capacitor loading time
- Hold conversion time
Analog Part
Digital Part
V
and V
AIN
SSA
Parameter
pins are not available on the pinout, the ADC refers to V
R
AIN
2)
AINx
f
DD
CPU
, f
=8MHz, f
OSC
Conditions
A
=25°C and V
, and T
V
DD
ADC
V
0.6V
V
0.6V
T
T
=4MHz
A
LOAD
unless otherwise specified.
DD
-V
. The first conversion after the enable is then
SS
=5V. They are given only as design guide-
I
±1μA
L
V
Min
SSA
DD
and V
Typ
SS
10-Bit A/D
Conversion
0
0.2
3.5
10
6
1
4
.
4)
1)
V
Max
10
ST7LITE1xB
DDA
4
3)
ST72XXX
C
6pF
139/159
1/f
ADC
Unit
MHz
mA
kΩ
pF
µs
V
ADC