Z8F0412SJ020SG Zilog, Z8F0412SJ020SG Datasheet - Page 17

• Manufacturer Part Number: Z8F0412SJ020SG
• Description: IC ENCORE MCU FLASH 4K 28SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0412SJ020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: Z8F041xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4107; Z8F0412SJ020SG

PS022517-0508
General Purpose Input/Output
Flash Controller
10-Bit Analog-to-Digital Converter
UART
The eZ8 CPU features include:
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For more information regarding the eZ8 CPU, refer to eZ8 CPU Core User Manual
(UM0128) available for download at www.zilog.com.
Z8 Encore! XP
Input/Output (GPIO). The number of GPIO pins available is a function of package. Each
pin is individually programmable. Ports A and C supports 5 V-tolerant inputs.
The Flash Controller programs and erases the Flash memory.
The optional Analog-to-Digital Converter (ADC) converts an analog input signal to a
10-bit binary number. The ADC accepts inputs from 2 to 5 different analog input sources.
The Universal Asynchronous Receiver/Transmitter (UART) is full-duplex and capable of
handling asynchronous data transfers. The UART supports 8-bit and 9-bit data modes and
selectable parity.
Direct register-to-register architecture allows each register to function as an
accumulator, improving execution time and decreasing the required Program Memory.
Software stack allows much greater depth in subroutine calls and interrupts than
hardware stacks.
Compatible with existing Z8
Expanded internal Register File allows access of up to 4 KB.
New instructions improve execution efficiency for code developed using higher-level
programming languages, including C.
Pipelined instruction fetch and execution.
New instructions for improved performance including BIT, BSWAP, BTJ, CPC, LDC,
LDCI, LEA, MULT, and SRL.
New instructions support 12-bit linear addressing of the Register File.
Up to 10 MIPS operation.
C-Compiler friendly.
2 to 9 clock cycles per instruction.
®
F0822 Series features 11 to 19 port pins (Ports A–C) for General Purpose
®
code.
Z8 Encore! XP
Product Specification
®
F0822 Series
Introduction
4