ST7FLITE35F2B6 STMicroelectronics, ST7FLITE35F2B6 Datasheet - Page 63

IC MCU 8BIT 8K FLASH 20DIP

ST7FLITE35F2B6

Manufacturer Part Number
ST7FLITE35F2B6
Description
IC MCU 8BIT 8K FLASH 20DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheets

Specifications of ST7FLITE35F2B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
LINSCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5085 - EVAL BOARD UNIV MOTOR CONTROL497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
DUAL 12-BIT AUTORELOAD TIMER 3 (Cont’d)
11.2.3.3 Input Capture Mode
The 12-bit ATICR register is used to latch the val-
ue of the 12-bit free running upcounter CNTR1 af-
ter a rising or falling edge is detected on the ATIC
pin. When an input capture occurs, the ICF bit is
set and the ATICR register contains the value of
the free running upcounter. An IC interrupt is gen-
erated if the ICIE bit is set. The ICF bit is reset by
Figure 42. Block Diagram of Input Capture Mode
Figure 43. Input Capture timing diagram
ATIC
COUNTER1
ICF FLAG
f
ATIC PIN
COUNTER
f
(1 ms
@ 8MHz)
LTIMER
timebase
f
OFF
CPU
01h
ATCSR
ATICR
02h
xxh
ICF
CNTR1
12-BIT INPUT CAPTURE REGISTER
ATR1
03h
ICIE
12-BIT AUTORELOAD REGISTER
04h
IC INTERRUPT
CK1
12-BIT UPCOUNTER1
REQUEST
05h
CK0
INTERRUPT
reading the ATICRH/ATICRL register when the
ICF bit is set. The ATICR is a read only register
and always contains the free running upcounter
value which corresponds to the most recent input
capture. Any further input capture is inhibited while
the ICF bit is set.
06h
07h
04h
08h
ATICR READ
09h
0Ah
09h
ST7LITE3xF2
INTERRUPT
t
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