Z8F0422SJ020EG Zilog, Z8F0422SJ020EG Datasheet - Page 38

• Manufacturer Part Number: Z8F0422SJ020EG
• Description: IC ENCORE MCU FLASH 4K 28SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0422SJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: Z8F042xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4142; Z8F0422SJ020EG

I2C Baud Rate Generator High Byte
I2CBRH (F53H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
I2C Baud Rate Generator Low Byte
I2CBRL (F54H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
SPI Data
SPIDATA (F60H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
PS022517-0508
I2C Baud Rate divisor [15:8]
I2C Baud Rate divisor [7:0]
SPI Data [7:0]
SPI Control
SPICTL (F61H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
Z8 Encore! XP
SPI Enable
Master Mode Enabled
mode
mode
Wire-OR (open-drain) Mode
configured for
MISO, and
open-drain
Clock Polarity
Phase Select
of the data
BRG Timer Interrupt Request
disabled
enabled
Start an SPI Interrupt Request
interrupt request
Interrupt Request Enable
are disabled
are enabled
1 = BRG time-out interrupt is
0 = SPI disabled
1 = SPI enabled
0 = SPI configured in Slave
1 = SPI configured in Master
0 = SPI signals not
1 = SPI signals (SCK, SS,
0 = SCK idles Low
1 = SPI idles High
Sets the phase relationship
to the clock.
0 = BRG timer function is
0 = No effect
1 = Generate an SPI
0 = SPI interrupt requests
1 = SPI interrupt requests
Product Specification
open-drain
MOSI) configured for
Control Register Summary
®
F0822 Series
25