ST7FLITE29F1B6 STMicroelectronics, ST7FLITE29F1B6 Datasheet - Page 23
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ST7FLITE29F1B6
Manufacturer Part Number
ST7FLITE29F1B6
Description
IC MCU 8BIT 8K FLASH 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST7FLITE29F1B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7 SUPPLY, RESET AND CLOCK MANAGEMENT
The device includes a range of utility features for
securing the application in critical situations (for
example in case of a power brown-out), and re-
ducing the number of external components.
Main features
■
■
■
7.1 INTERNAL RC OSCILLATOR ADJUSTMENT
The device contains an internal RC oscillator with
an accuracy of 1% for a given device, temperature
and voltage range (4.5V-5.5V). It must be calibrat-
ed to obtain the frequency required in the applica-
tion. This is done by software writing a calibration
value in the RCCR (RC Control Register).
Whenever the microcontroller is reset, the RCCR
returns to its default value (FFh), i.e. each time the
device is reset, the calibration value must be load-
ed in the RCCR. Predefined calibration values are
stored in EEPROM for 3 and 5V V
ages at 25°C, as shown in the following table.
Clock Management
– 1 MHz internal RC oscillator (enabled by op-
– 1 to 16 MHz or 32kHz External crystal/ceramic
– External Clock Input (enabled by option byte)
– PLL for multiplying the frequency by 8 or 4
– For clock ART counter only: PLL32 for multi-
Reset Sequence Manager (RSM)
System Integrity Management (SI)
– Main supply Low voltage detection (LVD) with
– Auxiliary Voltage detector (AVD) with interrupt
tion byte, available on ST7LITE25 and
ST7LITE29 devices only)
resonator (selected by option byte)
(enabled by option byte)
plying the 8 MHz frequency by 4 (enabled by
option byte). The 8 MHz input frequency is
mandatory and can be obtained in the follow-
ing ways:
reset generation (enabled by option byte)
capability for monitoring the main supply (en-
abled by option byte)
–1 MHz RC + PLLx8
–16 MHz external clock (internally divided
–2 MHz. external clock (internally divided by
–Crystal oscillator with 16 MHz output fre-
by 2)
2) + PLLx8
quency (internally divided by 2)
DD
supply volt-
Note:
– See “ELECTRICAL CHARACTERISTICS” on
– To improve clock stability and frequency accura-
– These two bytes are systematically programmed
– RCCR0 and RCCR1 calibration values will be
Caution: If the voltage or temperature conditions
change in the application, the frequency may need
to be recalibrated.
Refer to application note AN1324 for information
on how to calibrate the RC frequency using an ex-
ternal reference signal.
7.2 PHASE LOCKED LOOP
The PLL can be used to multiply a 1MHz frequen-
cy from the RC oscillator or the external clock by 4
or 8 to obtain f
bled and the multiplication factor of 4 or 8 is select-
ed by 2 option bits.
– The x4 PLL is intended for operation with V
– The x8 PLL is intended for operation with V
Refer to
tion.
If the PLL is disabled and the RC oscillator is ena-
bled, then f
If both the RC oscillator and the PLL are disabled,
f
OSC
RCCR0
RCCR1
RCCR
page 91. for more information on the frequency
and accuracy of the RC oscillator.
cy, it is recommended to place a decoupling ca-
pacitor, typically 100nF, between the V
V
by ST, including on FASTROM devices. Conse-
quently, customers intending to use FASTROM
service must not use these two bytes.
erased if the read-out protection bit is reset after
it has been set. See “Read-out Protection” on
page 14.
the 2.4V to 3.3V range
the 3.3V to 5.5V range
SS
is driven by the external clock.
pins as close as possible to the ST7 device.
Section 15.1
V
T
f
V
T
f
Conditions
RC
RC
A
A
DD
DD
OSC =
=25°C
=25°C
=1MHz
=700KHz
=5V
=3V
OSC
1MHz.
of 4 or 8 MHz. The PLL is ena-
1000h
and FFDEh
1001h
and FFDFh
for the option byte descrip-
ST7LITE29
Address
FFDEh
FFDFh
ST7LITE25
ST7LITE2
Address
DD
and
23/133
DD
DD
in
in
1