Z8F0422PJ020EG Zilog, Z8F0422PJ020EG Datasheet - Page 67

IC ENCORE MCU FLASH 4K 28DIP

Z8F0422PJ020EG

Manufacturer Part Number
Z8F0422PJ020EG
Description
IC ENCORE MCU FLASH 4K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0422PJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z8F042xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4140
Z8F0422PJ020EG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F0422PJ020EGR551H
Manufacturer:
ZILOG-PBF
Quantity:
9 045
Table 21. Port A–C Pull-Up Enable Sub-Registers
Table 22. Port A–C Input Data Registers (PxIN)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Port A–C Input Data Registers
7
PPUE7
PIN7
If 06H in Port A–C Address Register, accessible through the Port A–C Control Register
7
1 = The port pin is configured as a Stop Mode Recovery source. Any logic transition
Port A–C Pull-up Enable Sub-Registers
The Port A–C Pull-Up Enable sub-register
Control Register by writing
Port A–C Pull-Up Enable sub-registers enables a weak internal resistive pull-up on the
specified Port pins.
PPUE[7:0]—Port Pull-up Enabled
0 = The weak pull-up on the Port pin is disabled.
1 = The weak pull-up on the Port pin is enabled.
Reading from the Port A–C Input Data Registers
from the corresponding port pins. The Port A–C Input Data Registers are Read-only.
PIN[7:0]—Port Input Data
Sampled data from the corresponding port pin input.
0 = Input data is logical 0 (Low).
1 = Input data is logical 1 (High).
on this pin during STOP mode initiates Stop Mode Recovery.
6
PPUE6
PIN6
6
5
PPUE5
PIN5
5
06H
4
FD2H, FD6H, FDAH
PPUE4
to the Port A–C Address Register. Setting the bits in the
PIN4
4
R/W
R
X
0
3
(Table
PPUE3
PIN3
3
(Table
21) is accessed through the Port A–C
2
Z8 Encore! XP
22) returns the sampled values
PPUE2
PIN2
2
General-Purpose Input/Output
Product Specification
1
PPUE1
PIN1
1
®
F0822 Series
0
PPUE0
PIN0
0
54

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