ST7FLITE09Y0M6 STMicroelectronics, ST7FLITE09Y0M6 Datasheet - Page 32
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ST7FLITE09Y0M6
Manufacturer Part Number
ST7FLITE09Y0M6
Description
MCU 8BIT 1.5KB FLSH 128KB 16SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITES2Y0B6.pdf
(124 pages)
Specifications of ST7FLITE09Y0M6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Processor Series
ST7FLITE0x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLIT0-IND/USB, ST7FLIT2-COS/COM, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
For Use With
497-6250 - BOARD RGB COLOR CTRL STP04CM596497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5633-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FLITE09Y0M6
Manufacturer:
DIODES
Quantity:
43 000
Part Number:
ST7FLITE09Y0M6
Manufacturer:
ST
Quantity:
20 000
ST7LITE0xY0, ST7LITESxY0
8.4 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
the Low voltage Detector (LVD) and Auxiliary Volt-
age Detector (AVD) functions. It is managed by
the SICSR register.
Note: A reset can also be triggered following the
detection of an illegal opcode or prebyte code. Re-
fer to
8.4.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the V
below a V
it secures the power-up as well as the power-down
keeping the ST7 in reset.
The V
lower than the V
on in order to avoid a parasitic reset when the
MCU starts running and sinks current on the sup-
ply (hysteresis).
The LVD Reset circuitry generates a reset when
V
The LVD function is illustrated in
The voltage threshold can be configured by option
byte to be low, medium or high. See
on page
Figure 19. Low Voltage Detector vs Reset
32/124
1
DD
– V
– V
V
V
RESET
is below:
IT-
IT+
section 12.2.1 on page 78
IT+(LVD)
IT-(LVD)
IT-(LVD)
(LVD)
(LVD)
112.
IT-(LVD)
when V
when V
reference value for a voltage drop is
V
DD
IT+(LVD)
reference value. This means that
DD
DD
reference value for power-
is rising
is falling
DD
for further details.
Figure
supply voltage is
section 15.1
19.
Provided the minimum V
the oscillator frequency) is above V
MCU can only be in two modes:
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
The LVD is an optional function which can be se-
lected by option byte. See
112.
It allows the device to be used without any external
RESET circuitry.
If the LVD is disabled, an external circuitry must be
used to ensure a proper power-on reset.
It is recommended to make sure that the V
ply voltage rises monotonously when the device is
exiting from Reset, to ensure the application func-
tions properly.
Caution: If an LVD reset occurs after a watchdog
reset has occurred, the LVD will take priority and
will clear the watchdog flag.
V
– under full software control
– in static safe reset
hys
DD
section 15.1 on page
value (guaranteed for
IT-(LVD)
DD
, the
sup-