STM32F101C8U6 STMicroelectronics, STM32F101C8U6 Datasheet - Page 61
![MCU 32BIT ARM 128K FLASH 48-QFN](/photos/39/29/392930/qfn48_sml.jpg)
STM32F101C8U6
Manufacturer Part Number
STM32F101C8U6
Description
MCU 32BIT ARM 128K FLASH 48-QFN
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F101T8U6.pdf
(87 pages)
Specifications of STM32F101C8U6
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
37
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP Exposed Pad, 48-eLQFP, 48-HLQFP
Processor Series
STM32F101x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
10 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
37
Number Of Timers
3
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
For Use With
497-10030 - STARTER KIT FOR STM32497-6438 - BOARD EVALUTION FOR STM32 512K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F101C8U6
Manufacturer:
ST
Quantity:
185
Company:
Part Number:
STM32F101C8U6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM32F101x8, STM32F101xB
Table 39.
1. Guaranteed by design, not tested in production.
2. f
3. The maximum hold time of the Start condition has only to be met if the interface does not stretch the low
4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
t
w(SCLL)
t
su(SDA)
t
t
t
su(STO)
t
su(STA)
h(SDA)
4 MHz to achieve fast mode I
maximum I2C fast mode clock.
period of SCL signal.
undefined region of the falling edge of SCL.
h(STA)
r(SDA)
r(SCL)
f(SDA)
f(SCL)
PCLK1
C
b
must be higher than 2 MHz to achieve standard mode I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Repeated Start condition setup
time
Stop condition setup time
Stop to Start condition time (bus
free)
Capacitive load for each bus line
I
2
C characteristics
Parameter
2
C frequencies. It must be a multiple of 10 MHz to reach the 400 kHz
Doc ID 13586 Rev 14
Standard mode I
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
(3)
2
C frequencies. It must be higher than
1000
Max
300
400
2
C
(1)
Electrical characteristics
Fast mode I
20+0.1C
Min
100
0
1.3
0.6
0.6
0.6
1.3
0.6
(4)
b
2
900
Max
C
300
300
400
(1)(2)
(3)
Unit
61/87
pF
µs
ns
µs
µs
µs