ST72F561J6T6 STMicroelectronics, ST72F561J6T6 Datasheet - Page 187
ST72F561J6T6
Manufacturer Part Number
ST72F561J6T6
Description
MCU 8BIT 32KB FLASH 44-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F561K6T6.pdf
(265 pages)
Specifications of ST72F561J6T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
ST72F5x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
497-8374 - BOARD DEVELOPMENT FOR ST72F561497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-5617
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST72F561J6T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
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beCAN CONTROLLER (Cont’d)
10.9.7 BeCAN Cell Limitations
10.9.7.1 FIFO Corruption
FIFO corruption occurs in the following case:
WHEN the beCAN RX FIFO already holds two
messages (that is, FMP == 2)
WHILE the beCAN requests the transfer of a new
receive message into the FIFO (this lasts one CPU
cycle)
Figure 109. FIFO Corruption
and Receive Message D
Release Message C
Receive Message A
Receive Message B
Receive Message C
Release Message A
Release Message B
Receive Message E
Release Message E
Release Message B
AND the application releases the FIFO (with
the instruction CRFR = B_RFOM;)
THEN the internal FIFO pointer is not updat-
ed
BUT the FMP bits are updated correctly
* pointer to next receive location
v pointer to next message to be released
Initial State
FMP
0
1
2
3
2
2
3
2
1
0
v
E B C
v
v
v
A B C
E B C
E B C
* v
- - -
A - -
A B -
A B C
D B C
D B C
E B C
*
FIFO
*
*
v
* v
*
*
* v
v
*
*
*
v
v
When the FIFO is empty, v and * point to the same location
E released instead of B
* does not move because FIFO is full (normal operation)
D is overwritten by E
C released
* and v are not pointing to the same message
the FIFO is empty
* Does not move, pointer corruption
Normal operation
As the FIFO pointer is not updated correctly, this
causes the last message received to be overwrit-
ten by any incoming message. This means one
message is lost as shown in the example in
16. The beCAN will not recover normal operation
until a device reset occurs.
ST72561
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Figure
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