Z86E7216PSG Zilog, Z86E7216PSG Datasheet - Page 56

IC 16K OTP ZIRC 40-DIP

Z86E7216PSG

Manufacturer Part Number
Z86E7216PSG
Description
IC 16K OTP ZIRC 40-DIP
Manufacturer
Zilog
Series
Z8®r
Datasheet

Specifications of Z86E7216PSG

Core Processor
Z8
Core Size
8-Bit
Speed
16MHz
Peripherals
LVD, POR, WDT
Number Of I /o
31
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
748 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.620", 15.75mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
PS008704-0507
In demodulation mode, when set to 0, T16 captures and reloads on detection of all
the edges. When set to 1, T16 captures and detects on the first edge, but ignores
the subsequent edges. For details, see “T16 Demodulation Mode” on page 60.
Time_Out
This bit is set when T16 times out (terminal count reached). To reset it, a 1 must
be written to this location.
T16_Clock
This bit defines the frequency of the input signal to Counter/Timer16.
Capture_INT_Mask
Set this bit to allow interrupt when data is captured into LO16 and HI16.
Counter_INT_Mask
Set this bit to allow interrupt when T16 times out.
P35_Out
This bit defines whether P35 is used as a normal output pin or T16 output.
SMR2(F)0Dh Register
Table 25
Table 25. SMR2(F)0Dh Register
Field
Reserved
Recovery Level
Reserved
Source
Reserved
Note: * Indicates the value upon Power-On Reset.
describes Stop-Mode Recovery Register 2.
Bit Position
7-------
-6------
--5-----
---432--
------10
W
W
Value
0
0*
1
0
000*
001
010
011
100
101
110
111
00
Description
Reserved (Must be 0)
Low
High
Reserved (Must be 0)
A. POR Only
B. NAND of P23–P20
C. NAND or P27–P20
D. NOR of P33–P31
E. NAND of P33–P31
F. NOR of P33–P31, P00, P07
G. NAND of P33–P31, P00, P07
H. NAND of P33–P31, P22–P20
Reserved (Must be 0)
OTP Microcontroller
52

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