STR712FR2T6 STMicroelectronics, STR712FR2T6 Datasheet - Page 61

IC MCU ARM7 TDMI 256K 64-LQFP

STR712FR2T6

Manufacturer Part Number
STR712FR2T6
Description
IC MCU ARM7 TDMI 256K 64-LQFP
Manufacturer
STMicroelectronics
Series
STR7r
Datasheet

Specifications of STR712FR2T6

Core Processor
ARM7
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, HDLC, I²C, SmartCard, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8 + 16K)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
STR712x
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
CAN/EMI/USB
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MCBSTR7, KSK-STR712-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
STR710-SK/HIT, STR71X-SK/RAIS, STX-PRO/RAIS, STX-RLINK, STR79-RVDK/CPP, STR79-RVDK, STR79-RVDK/UPG
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 12-bit
Cpu Family
STR7
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
66MHz
Total Internal Ram Size
64KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
MCBSTR7UME - MCBSTR7 + ULINK-ME DEV KITMCBSTR7 - BOARD EVAL STM STR71X SERIES497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU497-4886 - KIT STARTER FOR STR712F ARM MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-4515

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STR71xF
Table 36.
Notes:
1. Data based on standard I
2. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
3. The maximum hold time t
4. Measurement points are done at CMOS levels: 0.3xV
5. f
6. The following table gives the values to be written in the I2CCCR register to obtain the required I
t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
w(SCLL)
t
su(SDA)
t
t
t
su(STO)
t
t
su(STA)
h(SDA)
undefined region of the falling edge of SCL.
frequency.
r(SDA)
r(SCL)
f(SDA)
h(STA)
f(SCL)
PCLK1
C
b
, must be at least 8 MHz to achieve max fast I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
Repeated START condition setup
time
STOP condition setup time
STOP to START condition time (bus
free)
Capacitive load for each bus line
I2C characteristics
Parameter
2
h(SDA)
C protocol requirement, not tested in production.
is not applicable.
2
C speed (400 kHz).
DD
Min
Standard mode
250
0
4.7
4.0
4.7
4.0
4.7
4.0
and 0.7xV
3)
1)
I
2
C
Max
DD
1000
300
400
.
1)
20+0.1C
20+0.1C
Fast mode I
Min
100
0
1.3
0.6
0.6
0.6
1.3
0.6
Electrical parameters
2)
1)
b
b
Max
900
2
300
300
400
2
C
C SCL line
5)
3)
1)
Unit
61/78
pF
µs
ns
µs
µs
µs

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