ST10F272M-4TR3 STMicroelectronics, ST10F272M-4TR3 Datasheet - Page 137

• Manufacturer Part Number: ST10F272M-4TR3
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F272M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F272M
(sampled voltage on C
must be designed to respect the following relation:
The formula above provides constraints for external network design, in particular on
resistive path.
A second aspect involving the capacitance network must be considered. Assuming the three
capacitances C
equivalent circuit shown in
close), a charge sharing phenomena is installed.
Figure 41. Charge sharing timing diagram during sampling phase
In particular two different transient periods can be distinguished (see
●
A first and quick charge transfer from the internal capacitance C
sampling capacitance C
considering a worst case (since the time constant in reality would be faster) in which
C
are in series, and the time constant is:
This relation can again be simplified considering only C
condition. In reality, the transient is faster, but the A/D converter circuitry has been
designed to be robust also in the very worst case: the sampling time T
longer than the internal time constant:
The charge of C
voltage V
P2
is shown in parallel to C
V
V
V
V
CS
A
A2
A1
A1
F
, C
on the capacitance according to the following equation:
1
P1
P1
and C
S
Voltage transient on C
V A1
) and the sum of R
and C
V A
τ 1
Figure
P2
⋅
⋅
S
<
P2
(
2
initially charged at the source voltage V
occurs (C
C S
R S
----------------------------------------------------------------------------- -
τ 1
(
R SW
is redistributed also on C
P1
40), when the sampling phase is started (A/D switch
=
+
+
(call C
C P1
R F
(
R SW
+
S
R AD
+
S
+
R L
R EQ
is supposed initially completely discharged):
C P2
P
+
S
)
R AD
= C
+ R
+
⋅
R SW
)
T
C S
S
P1
F
=
)
+ R
⋅
< <
V A
+ C
+
∆V < 0.5 LSB
t
C P
----------------------- -
C P
R AD
L
⋅
P2
+ R
⋅
T
+
(
), the two capacitance C
S
C P1
C S
C S
S
<
SW
, determining a new value of the
τ
τ
1
-- - LSB
2
S
1
2
+
< (R
= R
+ R
as an additional worst
C P2
L
SW
Electrical characteristics
(C
AD
S
+ R
)
, the external circuit
+ C
P1
Figure
AD
A
P1
) C
and C
(refer to the
+ C
S
S
<< T
P2
is always much
41):
)
P2
S
to the
P
and C
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